{"id":"https://openalex.org/W2094032350","doi":"https://doi.org/10.1109/reconfig.2014.7032518","title":"Fast and generic hardware architecture for stereo block matching applications on embedded systems","display_name":"Fast and generic hardware architecture for stereo block matching applications on embedded systems","publication_year":2014,"publication_date":"2014-12-01","ids":{"openalex":"https://openalex.org/W2094032350","doi":"https://doi.org/10.1109/reconfig.2014.7032518","mag":"2094032350"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig.2014.7032518","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2014.7032518","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090573570","display_name":"Konrad H\u00e4ublein","orcid":null},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Konrad Haublein","raw_affiliation_strings":["Department of Computer Science, Friedrich-Alexander-University, Erlangen-Nuremberg, Germany","Department of Computer Science, Chair of Computer Architecture, Friedrich-Alexander-University Erlangen-Nuremberg, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Friedrich-Alexander-University, Erlangen-Nuremberg, Germany","institution_ids":["https://openalex.org/I181369854"]},{"raw_affiliation_string":"Department of Computer Science, Chair of Computer Architecture, Friedrich-Alexander-University Erlangen-Nuremberg, Germany","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014794132","display_name":"Marc Reichenbach","orcid":"https://orcid.org/0000-0002-9687-6247"},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Marc Reichenbach","raw_affiliation_strings":["Department of Computer Science, Friedrich-Alexander-University, Erlangen-Nuremberg, Germany","Department of Computer Science, Chair of Computer Architecture, Friedrich-Alexander-University Erlangen-Nuremberg, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Friedrich-Alexander-University, Erlangen-Nuremberg, Germany","institution_ids":["https://openalex.org/I181369854"]},{"raw_affiliation_string":"Department of Computer Science, Chair of Computer Architecture, Friedrich-Alexander-University Erlangen-Nuremberg, Germany","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5030918623","display_name":"Dietmar Fey","orcid":"https://orcid.org/0000-0002-6077-4732"},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Dietmar Fey","raw_affiliation_strings":["Department of Computer Science, Friedrich-Alexander-University, Erlangen-Nuremberg, Germany","Department of Computer Science, Chair of Computer Architecture, Friedrich-Alexander-University Erlangen-Nuremberg, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Friedrich-Alexander-University, Erlangen-Nuremberg, Germany","institution_ids":["https://openalex.org/I181369854"]},{"raw_affiliation_string":"Department of Computer Science, Chair of Computer Architecture, Friedrich-Alexander-University Erlangen-Nuremberg, Germany","institution_ids":["https://openalex.org/I181369854"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I181369854"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13114","display_name":"Image Processing Techniques and Applications","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11105","display_name":"Advanced Image Processing Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8280619382858276},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.638241171836853},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6171302795410156},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.5513888001441956},{"id":"https://openalex.org/keywords/frame-rate","display_name":"Frame rate","score":0.5162568092346191},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.49117323756217957},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.437175989151001},{"id":"https://openalex.org/keywords/hardware-architecture","display_name":"Hardware architecture","score":0.42015111446380615},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.3677457869052887},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3224793076515198},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.23071947693824768}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8280619382858276},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.638241171836853},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6171302795410156},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.5513888001441956},{"id":"https://openalex.org/C3261483","wikidata":"https://www.wikidata.org/wiki/Q119565","display_name":"Frame rate","level":2,"score":0.5162568092346191},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.49117323756217957},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.437175989151001},{"id":"https://openalex.org/C65232700","wikidata":"https://www.wikidata.org/wiki/Q5656403","display_name":"Hardware architecture","level":3,"score":0.42015111446380615},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3677457869052887},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3224793076515198},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.23071947693824768},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/reconfig.2014.7032518","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2014.7032518","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W289435935","https://openalex.org/W1496299147","https://openalex.org/W1967524458","https://openalex.org/W1976760299","https://openalex.org/W2025738728","https://openalex.org/W2037931330","https://openalex.org/W2042707118","https://openalex.org/W2090451013","https://openalex.org/W2111507054","https://openalex.org/W2133771133","https://openalex.org/W2149382386","https://openalex.org/W2155479981","https://openalex.org/W2156068106","https://openalex.org/W6656948348"],"related_works":["https://openalex.org/W3004362061","https://openalex.org/W2364622490","https://openalex.org/W2383986884","https://openalex.org/W2356141508","https://openalex.org/W2042515040","https://openalex.org/W4297665406","https://openalex.org/W2749962643","https://openalex.org/W2101296662","https://openalex.org/W2390807153","https://openalex.org/W2281932057"],"abstract_inverted_index":{"Even":[0],"with":[1],"the":[2,26,42,178,193,197,207,210,225],"tremendous":[3],"performance":[4],"increase":[5],"of":[6,17,28,44,75,96],"microprocessor":[7],"architectures":[8,60],"in":[9,25,94,117,143,163],"recent":[10],"years,":[11],"real":[12,118,164],"time":[13],"capturing":[14],"and":[15,68,151,196,214,232],"computing":[16],"stereo":[18,33,104,135],"images":[19,116,162],"remains":[20],"a":[21,82,103,126,170,183,190],"challenging":[22],"task,":[23],"particularly":[24],"field":[27],"embedded":[29],"image":[30,147],"processing.":[31],"The":[32,200],"block":[34,105,136],"matching":[35,106,137],"technique":[36,77],"allows":[37,158],"hardware":[38,59,179,234],"designers":[39,52,222],"to":[40,57,81,87,112,159,181,205,209,223],"parallelize":[41],"process":[43,113],"depth":[45,229],"map":[46,230],"calculation.":[47],"Additionally,":[48],"for":[49,61,102,131,169],"smart":[50],"camera":[51,84],"it":[53],"is":[54,109,120,140,174,202],"also":[55,110,203],"crucial":[56],"adapt":[58,206],"different":[62],"FPGA":[63,215],"platforms,":[64],"sensor":[65,212],"properties,":[66],"throughput,":[67],"accuracy.":[69],"However,":[70],"most":[71],"application":[72],"specific":[73],"implementations":[74],"this":[76],"are":[78],"usually":[79],"fixed":[80],"single":[83],"set":[85],"up":[86],"achieve":[88],"high":[89,114],"frame":[90],"rates,":[91],"but":[92],"lack":[93],"flexibility":[95],"these":[97],"properties.":[98],"A":[99],"general":[100],"approach":[101],"model,":[107],"which":[108,188],"able":[111,204],"resolution":[115],"time,":[119],"still":[121],"missing.":[122],"Therefore,":[123],"we":[124],"present":[125],"new":[127],"generic":[128],"VHDL":[129],"template":[130],"fast":[132],"window":[133,149],"based":[134],"correlation.":[138],"It":[139],"fully":[141],"scalable":[142],"functional":[144],"parameters":[145],"like":[146],"size,":[148,150],"disparity":[152],"range.":[153],"Its":[154],"streaming":[155],"character":[156],"even":[157],"compute":[160],"HD":[161],"time.":[165],"Also":[166],"an":[167],"interface":[168],"flexible":[171],"PE":[172],"structure":[173],"provided.":[175],"This":[176],"enables":[177],"designer":[180],"apply":[182],"custom":[184],"made":[185],"cost":[186],"function,":[187],"performs":[189],"correlation":[191],"between":[192,228],"target":[194],"windows":[195],"reference":[198],"window.":[199],"developer":[201],"model":[208],"available":[211,233],"speed":[213],"resource":[216],"limitations.":[217],"These":[218],"features":[219],"should":[220],"help":[221],"find":[224],"right":[226],"trade-off":[227],"quality":[231],"resources.":[235]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}