{"id":"https://openalex.org/W2093405912","doi":"https://doi.org/10.1109/reconfig.2014.7032490","title":"A hardware generator for factor graph applications","display_name":"A hardware generator for factor graph applications","publication_year":2014,"publication_date":"2014-12-01","ids":{"openalex":"https://openalex.org/W2093405912","doi":"https://doi.org/10.1109/reconfig.2014.7032490","mag":"2093405912"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig.2014.7032490","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2014.7032490","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://vtechworks.lib.vt.edu/bitstreams/805d6c3d-c546-4021-9b43-0d4c729d2b10/download","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030464005","display_name":"James Demma","orcid":null},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"James Demma","raw_affiliation_strings":["Bradley Department of Electrical and Computer Engineering, Virginia Polytechnic and State University, Blacksburg, VA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bradley Department of Electrical and Computer Engineering, Virginia Polytechnic and State University, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111933984","display_name":"Peter Athanas","orcid":null},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Peter Athanas","raw_affiliation_strings":["Bradley Department of Electrical and Computer Engineering, Virginia Polytechnic and State University, Blacksburg, VA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bradley Department of Electrical and Computer Engineering, Virginia Polytechnic and State University, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I859038795"],"apc_list":null,"apc_paid":null,"fwci":0.5515,"has_fulltext":true,"cited_by_count":2,"citation_normalized_percentile":{"value":0.61999251,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"11","issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/factor-graph","display_name":"Factor graph","score":0.8110388517379761},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7886930704116821},{"id":"https://openalex.org/keywords/low-density-parity-check-code","display_name":"Low-density parity-check code","score":0.5592522025108337},{"id":"https://openalex.org/keywords/factor","display_name":"Factor (programming language)","score":0.4844055771827698},{"id":"https://openalex.org/keywords/scripting-language","display_name":"Scripting language","score":0.48040035367012024},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.47309163212776184},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.46696192026138306},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4594166874885559},{"id":"https://openalex.org/keywords/python","display_name":"Python (programming language)","score":0.45872753858566284},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4545934796333313},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.4444468021392822},{"id":"https://openalex.org/keywords/random-access","display_name":"Random access","score":0.4189113974571228},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.4156273603439331},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3845428228378296},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3590654134750366},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3037179112434387}],"concepts":[{"id":"https://openalex.org/C159246509","wikidata":"https://www.wikidata.org/wiki/Q5428725","display_name":"Factor graph","level":3,"score":0.8110388517379761},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7886930704116821},{"id":"https://openalex.org/C67692717","wikidata":"https://www.wikidata.org/wiki/Q187444","display_name":"Low-density parity-check code","level":3,"score":0.5592522025108337},{"id":"https://openalex.org/C2781039887","wikidata":"https://www.wikidata.org/wiki/Q1391724","display_name":"Factor (programming language)","level":2,"score":0.4844055771827698},{"id":"https://openalex.org/C61423126","wikidata":"https://www.wikidata.org/wiki/Q187432","display_name":"Scripting language","level":2,"score":0.48040035367012024},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.47309163212776184},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.46696192026138306},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4594166874885559},{"id":"https://openalex.org/C519991488","wikidata":"https://www.wikidata.org/wiki/Q28865","display_name":"Python (programming language)","level":2,"score":0.45872753858566284},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4545934796333313},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.4444468021392822},{"id":"https://openalex.org/C101722063","wikidata":"https://www.wikidata.org/wiki/Q218825","display_name":"Random access","level":2,"score":0.4189113974571228},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.4156273603439331},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3845428228378296},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3590654134750366},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3037179112434387}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/reconfig.2014.7032490","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2014.7032490","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14)","raw_type":"proceedings-article"},{"id":"pmh:oai:vtechworks.lib.vt.edu:10919/48599","is_oa":true,"landing_page_url":"http://hdl.handle.net/10919/48599","pdf_url":"https://vtechworks.lib.vt.edu/bitstreams/805d6c3d-c546-4021-9b43-0d4c729d2b10/download","source":{"id":"https://openalex.org/S4306400248","display_name":"VTechWorks (Virginia Tech)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I859038795","host_organization_name":"Virginia Tech","host_organization_lineage":["https://openalex.org/I859038795"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Thesis"}],"best_oa_location":{"id":"pmh:oai:vtechworks.lib.vt.edu:10919/48599","is_oa":true,"landing_page_url":"http://hdl.handle.net/10919/48599","pdf_url":"https://vtechworks.lib.vt.edu/bitstreams/805d6c3d-c546-4021-9b43-0d4c729d2b10/download","source":{"id":"https://openalex.org/S4306400248","display_name":"VTechWorks (Virginia Tech)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I859038795","host_organization_name":"Virginia Tech","host_organization_lineage":["https://openalex.org/I859038795"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Thesis"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2093405912.pdf","grobid_xml":"https://content.openalex.org/works/W2093405912.grobid-xml"},"referenced_works_count":19,"referenced_works":["https://openalex.org/W213300876","https://openalex.org/W1507028917","https://openalex.org/W1543176451","https://openalex.org/W1562109168","https://openalex.org/W1825099611","https://openalex.org/W1970054125","https://openalex.org/W1981264533","https://openalex.org/W2031530206","https://openalex.org/W2079450008","https://openalex.org/W2093405912","https://openalex.org/W2103002771","https://openalex.org/W2107916292","https://openalex.org/W2150859678","https://openalex.org/W2169447051","https://openalex.org/W2536208356","https://openalex.org/W6633926287","https://openalex.org/W6638689996","https://openalex.org/W6675508746","https://openalex.org/W6684888907"],"related_works":["https://openalex.org/W2903058006","https://openalex.org/W2102374550","https://openalex.org/W2047069332","https://openalex.org/W2352157218","https://openalex.org/W4213381250","https://openalex.org/W2806845321","https://openalex.org/W2393084694","https://openalex.org/W2046765700","https://openalex.org/W4388717827","https://openalex.org/W223727341"],"abstract_inverted_index":{"A":[0,100],"Factor":[1],"Graph":[2],"(FG-http://en.wikipedia.org/wiki/Factor_graph)":[3],"is":[4,75],"a":[5,18,73,98,155,170,177,183,193],"structure":[6],"used":[7,113],"to":[8,11,38,45,114,144,191],"And":[9],"solutions":[10],"problems":[12],"that":[13],"can":[14,42],"be":[15,43],"represented":[16],"as":[17,68,169,176],"Probabilistic":[19],"Graphical":[20],"Model":[21],"(PGM).":[22],"They":[23],"consist":[24],"of":[25,48,80,83,91,102,154,158,172,179],"interconnected":[26],"variable":[27],"nodes":[28],"and":[29,35,55,63,94,105,175],"factor":[30],"nodes,":[31],"which":[32],"iteratively":[33],"compute":[34],"pass":[36],"messages":[37],"each":[39],"other.":[40],"FG's":[41],"applied":[44,143,190],"solve":[46],"decoding":[47],"forward":[49],"error":[50],"correcting":[51],"codes,":[52],"Markov":[53,56],"chains":[54],"Random":[57],"Fields,":[58],"Kaiman":[59],"Filtering,":[60],"Fourier":[61],"Transforms,":[62],"even":[64],"some":[65],"games":[66],"such":[67],"Sudoku.":[69],"In":[70],"this":[71],"paper,":[72],"framework":[74,96,137,187],"presented":[76],"for":[77,120],"rapid":[78],"prototyping":[79],"hardware":[81],"implementations":[82],"FG-based":[84],"applications.":[85],"The":[86,123,136,152],"FG":[87],"developer":[88],"specifies":[89],"aspects":[90],"the":[92,95,116,121,132,173,186],"application,":[93],"returns":[97],"design.":[99],"system":[101,174],"Python":[103],"scripts":[104],"Verilog":[106],"Hardware":[107],"Description":[108],"Language":[109],"templates":[110],"together":[111],"are":[112,126],"generate":[115],"HDL":[117],"source":[118],"code":[119],"application.":[122],"generated":[124,159],"designs":[125],"vendor/platform":[127],"agnostic,":[128],"but":[129],"currently":[130],"target":[131],"Xilinx":[133],"Virtex-6-based":[134],"ML605.":[135],"has":[138,188],"so":[139],"far":[140],"been":[141,167,189],"primarily":[142],"construct":[145,192],"Low":[146],"Density":[147],"Parity":[148],"Check":[149],"(LDPC)":[150],"decoders.":[151],"characteristics":[153],"large":[156],"basket":[157],"LDPC":[160],"decoders,":[161,165],"including":[162],"contemporary":[163],"802.11\u03b7":[164],"have":[166],"examined":[168],"verification":[171],"demonstration":[178],"its":[180],"capabilities.":[181],"As":[182],"further":[184],"demonstration,":[185],"Sudoku":[194],"solver.":[195]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-08-23T07:36:19.812096","created_date":"2025-10-10T00:00:00"}