{"id":"https://openalex.org/W2068249309","doi":"https://doi.org/10.1109/reconfig.2013.6732322","title":"Processor arrays generation for matrix algorithms used in embedded platforms","display_name":"Processor arrays generation for matrix algorithms used in embedded platforms","publication_year":2013,"publication_date":"2013-12-01","ids":{"openalex":"https://openalex.org/W2068249309","doi":"https://doi.org/10.1109/reconfig.2013.6732322","mag":"2068249309"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig.2013.6732322","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2013.6732322","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083529129","display_name":"Roberto P\u00e9rez-Andrade","orcid":null},"institutions":[{"id":"https://openalex.org/I68368234","display_name":"Center for Research and Advanced Studies of the National Polytechnic Institute","ror":"https://ror.org/009eqmr18","country_code":"MX","type":"facility","lineage":["https://openalex.org/I59361560","https://openalex.org/I68368234"]},{"id":"https://openalex.org/I4210090124","display_name":"Tecnol\u00f3gico Nacional de M\u00e9xico","ror":"https://ror.org/00davry38","country_code":"MX","type":"funder","lineage":["https://openalex.org/I1302736544","https://openalex.org/I4210090124","https://openalex.org/I4413696010"]}],"countries":["MX"],"is_corresponding":true,"raw_author_name":"Roberto Perez-Andrade","raw_affiliation_strings":["Advanced Studies Center of the National Polytechic Institute, Information Technology Laboratory, Ciudad Victoria, Mexico","Adv. Studies Center, Inf. Technol. Lab., CINVESTAV-IPN, Ciudad Victoria, Mexico"],"affiliations":[{"raw_affiliation_string":"Advanced Studies Center of the National Polytechic Institute, Information Technology Laboratory, Ciudad Victoria, Mexico","institution_ids":["https://openalex.org/I4210090124"]},{"raw_affiliation_string":"Adv. Studies Center, Inf. Technol. Lab., CINVESTAV-IPN, Ciudad Victoria, Mexico","institution_ids":["https://openalex.org/I68368234"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055637870","display_name":"C\u00e9sar Torres-Huitzil","orcid":"https://orcid.org/0000-0002-8980-0615"},"institutions":[{"id":"https://openalex.org/I68368234","display_name":"Center for Research and Advanced Studies of the National Polytechnic Institute","ror":"https://ror.org/009eqmr18","country_code":"MX","type":"facility","lineage":["https://openalex.org/I59361560","https://openalex.org/I68368234"]},{"id":"https://openalex.org/I4210090124","display_name":"Tecnol\u00f3gico Nacional de M\u00e9xico","ror":"https://ror.org/00davry38","country_code":"MX","type":"funder","lineage":["https://openalex.org/I1302736544","https://openalex.org/I4210090124","https://openalex.org/I4413696010"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"Cesar Torres-Huitzil","raw_affiliation_strings":["Advanced Studies Center of the National Polytechic Institute, Information Technology Laboratory, Ciudad Victoria, Mexico","Adv. Studies Center, Inf. Technol. Lab., CINVESTAV-IPN, Ciudad Victoria, Mexico"],"affiliations":[{"raw_affiliation_string":"Advanced Studies Center of the National Polytechic Institute, Information Technology Laboratory, Ciudad Victoria, Mexico","institution_ids":["https://openalex.org/I4210090124"]},{"raw_affiliation_string":"Adv. Studies Center, Inf. Technol. Lab., CINVESTAV-IPN, Ciudad Victoria, Mexico","institution_ids":["https://openalex.org/I68368234"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046277367","display_name":"Ren\u00e9 Cumplido","orcid":"https://orcid.org/0000-0002-9852-8422"},"institutions":[{"id":"https://openalex.org/I39824353","display_name":"National Institute of Astrophysics, Optics and Electronics","ror":"https://ror.org/00bpmmc63","country_code":"MX","type":"facility","lineage":["https://openalex.org/I39824353"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"Rene Cumplido","raw_affiliation_strings":["Department of Computer Science, National Institute for Astrophysics, Optics and Electronics, Puebla, Mexico","Dept. of Comput. Sci., Nat. Inst. for Astrophys., Opt. & Electron. (INAOE), Tonantzintla, Mexico"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Institute for Astrophysics, Optics and Electronics, Puebla, Mexico","institution_ids":["https://openalex.org/I39824353"]},{"raw_affiliation_string":"Dept. of Comput. Sci., Nat. Inst. for Astrophys., Opt. & Electron. (INAOE), Tonantzintla, Mexico","institution_ids":["https://openalex.org/I39824353"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5020724185","display_name":"Juan M. Campos","orcid":null},"institutions":[{"id":"https://openalex.org/I39824353","display_name":"National Institute of Astrophysics, Optics and Electronics","ror":"https://ror.org/00bpmmc63","country_code":"MX","type":"facility","lineage":["https://openalex.org/I39824353"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"Juan M. Campos","raw_affiliation_strings":["Department of Computer Science, National Institute for Astrophysics, Optics and Electronics, Puebla, Mexico","Dept. of Comput. Sci., Nat. Inst. for Astrophys., Opt. & Electron. (INAOE), Tonantzintla, Mexico"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Institute for Astrophysics, Optics and Electronics, Puebla, Mexico","institution_ids":["https://openalex.org/I39824353"]},{"raw_affiliation_string":"Dept. of Comput. Sci., Nat. Inst. for Astrophys., Opt. & Electron. (INAOE), Tonantzintla, Mexico","institution_ids":["https://openalex.org/I39824353"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5083529129"],"corresponding_institution_ids":["https://openalex.org/I4210090124","https://openalex.org/I68368234"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12368331,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.989799976348877,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.989799976348877,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10575","display_name":"Wireless Communication Networks Research","score":0.9807999730110168,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11946","display_name":"Antenna Design and Optimization","score":0.9800999760627747,"subfield":{"id":"https://openalex.org/subfields/2202","display_name":"Aerospace Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8028241395950317},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7327786087989807},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.5561062693595886},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.462038516998291},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.4583541452884674},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.4467657804489136},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4426736831665039},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.4367557764053345},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4293111562728882},{"id":"https://openalex.org/keywords/sparse-matrix","display_name":"Sparse matrix","score":0.4243989586830139},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.4167572557926178},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4019862711429596},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3966529965400696},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3629738688468933},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3389911651611328},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.25882551074028015}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8028241395950317},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7327786087989807},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.5561062693595886},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.462038516998291},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.4583541452884674},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4467657804489136},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4426736831665039},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4367557764053345},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4293111562728882},{"id":"https://openalex.org/C56372850","wikidata":"https://www.wikidata.org/wiki/Q1050404","display_name":"Sparse matrix","level":3,"score":0.4243989586830139},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.4167572557926178},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4019862711429596},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3966529965400696},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3629738688468933},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3389911651611328},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.25882551074028015},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C163716315","wikidata":"https://www.wikidata.org/wiki/Q901177","display_name":"Gaussian","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/reconfig.2013.6732322","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2013.6732322","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.7799999713897705}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321739","display_name":"Consejo Nacional de Ciencia y Tecnolog\u00eda","ror":"https://ror.org/059ex5q34"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1017723581","https://openalex.org/W1530279678","https://openalex.org/W1604677972","https://openalex.org/W1794109639","https://openalex.org/W1970008223","https://openalex.org/W1975639590","https://openalex.org/W1983427062","https://openalex.org/W2060871247","https://openalex.org/W2098025310","https://openalex.org/W2111670418","https://openalex.org/W2112426310","https://openalex.org/W2120881863","https://openalex.org/W2147248053","https://openalex.org/W2152089383","https://openalex.org/W2170388723","https://openalex.org/W2402854315","https://openalex.org/W2482246557","https://openalex.org/W6642793095"],"related_works":["https://openalex.org/W2390348052","https://openalex.org/W2065566231","https://openalex.org/W2390600871","https://openalex.org/W2128523353","https://openalex.org/W2363399630","https://openalex.org/W2148867666","https://openalex.org/W1980880153","https://openalex.org/W4243132314","https://openalex.org/W2030992542","https://openalex.org/W2298526277"],"abstract_inverted_index":{"Matrix":[0],"algorithms":[1,55],"are":[2,14],"an":[3],"important":[4],"part":[5],"of":[6,90],"many":[7,23],"digital":[8],"signal":[9],"processing":[10],"applications":[11],"as":[12,80,82,132],"they":[13],"core":[15],"kernels":[16],"that":[17,119],"usually":[18],"need":[19],"to":[20,48,129],"be":[21],"applied":[22],"times.":[24],"Hardware":[25],"assisted":[26],"implementations":[27,127],"using":[28],"FPGAs":[29],"provide":[30],"a":[31,43,65,88,114],"good":[32],"compromise":[33],"between":[34],"performance,":[35],"cost":[36],"and":[37,72,125],"power":[38],"consumption.":[39],"This":[40],"paper":[41],"presents":[42],"high":[44],"level":[45],"synthesis":[46],"approach":[47,63,100],"generate":[49],"embedded":[50,130],"processor":[51,78,106],"arrays":[52,107],"for":[53,67,75,86,108,113],"matrix":[54],"based":[56],"on":[57,94],"the":[58,77,120],"polytope":[59],"model.":[60],"The":[61,98],"proposed":[62,99],"provides":[64,84],"solution":[66],"efficient":[68],"data":[69,73],"memory":[70],"accesses":[71],"transferring":[74],"feeding":[76],"array,":[79],"well":[81],"it":[83],"support":[85],"solving":[87],"set":[89],"problem":[91],"size":[92],"depending":[93],"FPGA":[95],"available":[96],"resources.":[97],"has":[101],"been":[102],"validated":[103],"by":[104],"generating":[105],"two":[109],"case":[110],"studies":[111],"targeted":[112,128],"Spartan-6":[115],"device.":[116],"Results":[117],"show":[118],"implemented":[121],"array":[122],"outperforms":[123],"hardware":[124],"software":[126],"platforms":[131],"well.":[133]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}