{"id":"https://openalex.org/W2068104961","doi":"https://doi.org/10.1109/reconfig.2013.6732296","title":"FPGA<sup>2</sup>: An open source framework for FPGA-GPU PCIe communication","display_name":"FPGA<sup>2</sup>: An open source framework for FPGA-GPU PCIe communication","publication_year":2013,"publication_date":"2013-12-01","ids":{"openalex":"https://openalex.org/W2068104961","doi":"https://doi.org/10.1109/reconfig.2013.6732296","mag":"2068104961"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig.2013.6732296","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2013.6732296","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://arodes.hes-so.ch/record/3433/files/Thoma_2014_FPGA2.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5071713639","display_name":"Yann Thoma","orcid":"https://orcid.org/0000-0003-4374-6104"},"institutions":[{"id":"https://openalex.org/I173439891","display_name":"HES-SO University of Applied Sciences and Arts Western Switzerland","ror":"https://ror.org/01xkakk17","country_code":"CH","type":"education","lineage":["https://openalex.org/I173439891"]}],"countries":["CH"],"is_corresponding":true,"raw_author_name":"Yann Thoma","raw_affiliation_strings":["Reconfigurable and Embedded Digital Systems Institute-REDS, University of Applied Sciences Western Switzerland, Yverdon-les-Bains, Switzerland","Reconfigurable & Embedded Digital Syst. Inst., Univ. of Appl. Sci. Western Switzerland, Yverdon-les-Bains, Switzerland"],"affiliations":[{"raw_affiliation_string":"Reconfigurable and Embedded Digital Systems Institute-REDS, University of Applied Sciences Western Switzerland, Yverdon-les-Bains, Switzerland","institution_ids":["https://openalex.org/I173439891"]},{"raw_affiliation_string":"Reconfigurable & Embedded Digital Syst. Inst., Univ. of Appl. Sci. Western Switzerland, Yverdon-les-Bains, Switzerland","institution_ids":["https://openalex.org/I173439891"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055339109","display_name":"Alberto Dassatti","orcid":"https://orcid.org/0000-0002-5342-3723"},"institutions":[{"id":"https://openalex.org/I173439891","display_name":"HES-SO University of Applied Sciences and Arts Western Switzerland","ror":"https://ror.org/01xkakk17","country_code":"CH","type":"education","lineage":["https://openalex.org/I173439891"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Alberto Dassatti","raw_affiliation_strings":["Reconfigurable and Embedded Digital Systems Institute-REDS, University of Applied Sciences Western Switzerland, Yverdon-les-Bains, Switzerland","Reconfigurable & Embedded Digital Syst. Inst., Univ. of Appl. Sci. Western Switzerland, Yverdon-les-Bains, Switzerland"],"affiliations":[{"raw_affiliation_string":"Reconfigurable and Embedded Digital Systems Institute-REDS, University of Applied Sciences Western Switzerland, Yverdon-les-Bains, Switzerland","institution_ids":["https://openalex.org/I173439891"]},{"raw_affiliation_string":"Reconfigurable & Embedded Digital Syst. Inst., Univ. of Appl. Sci. Western Switzerland, Yverdon-les-Bains, Switzerland","institution_ids":["https://openalex.org/I173439891"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5067533572","display_name":"Daniel Molla","orcid":null},"institutions":[{"id":"https://openalex.org/I173439891","display_name":"HES-SO University of Applied Sciences and Arts Western Switzerland","ror":"https://ror.org/01xkakk17","country_code":"CH","type":"education","lineage":["https://openalex.org/I173439891"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Daniel Molla","raw_affiliation_strings":["Reconfigurable and Embedded Digital Systems Institute-REDS, University of Applied Sciences Western Switzerland, Yverdon-les-Bains, Switzerland","Reconfigurable & Embedded Digital Syst. Inst., Univ. of Appl. Sci. Western Switzerland, Yverdon-les-Bains, Switzerland"],"affiliations":[{"raw_affiliation_string":"Reconfigurable and Embedded Digital Systems Institute-REDS, University of Applied Sciences Western Switzerland, Yverdon-les-Bains, Switzerland","institution_ids":["https://openalex.org/I173439891"]},{"raw_affiliation_string":"Reconfigurable & Embedded Digital Syst. Inst., Univ. of Appl. Sci. Western Switzerland, Yverdon-les-Bains, Switzerland","institution_ids":["https://openalex.org/I173439891"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5071713639"],"corresponding_institution_ids":["https://openalex.org/I173439891"],"apc_list":null,"apc_paid":null,"fwci":2.5217,"has_fulltext":true,"cited_by_count":14,"citation_normalized_percentile":{"value":0.89456299,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/pci-express","display_name":"PCI Express","score":0.948531985282898},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8745232820510864},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8177913427352905},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5058597922325134},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.4324359893798828},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4111418128013611},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3815922141075134},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2621638774871826}],"concepts":[{"id":"https://openalex.org/C64270927","wikidata":"https://www.wikidata.org/wiki/Q206924","display_name":"PCI Express","level":3,"score":0.948531985282898},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8745232820510864},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8177913427352905},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5058597922325134},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4324359893798828},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4111418128013611},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3815922141075134},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2621638774871826},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/reconfig.2013.6732296","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2013.6732296","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},{"id":"pmh:oai:hesso.tind.io:3433","is_oa":true,"landing_page_url":"http://arodes.hes-so.ch/record/3433","pdf_url":"https://arodes.hes-so.ch/record/3433/files/Thoma_2014_FPGA2.pdf","source":{"id":"https://openalex.org/S4306402432","display_name":"ArODES (HES-SO (https://www.hes-so.ch/))","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210088449","host_organization_name":"HES-SO Gen\u00e8ve","host_organization_lineage":["https://openalex.org/I4210088449"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://arodes.hes-so.ch/record/3433","raw_type":"Text"}],"best_oa_location":{"id":"pmh:oai:hesso.tind.io:3433","is_oa":true,"landing_page_url":"http://arodes.hes-so.ch/record/3433","pdf_url":"https://arodes.hes-so.ch/record/3433/files/Thoma_2014_FPGA2.pdf","source":{"id":"https://openalex.org/S4306402432","display_name":"ArODES (HES-SO (https://www.hes-so.ch/))","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210088449","host_organization_name":"HES-SO Gen\u00e8ve","host_organization_lineage":["https://openalex.org/I4210088449"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://arodes.hes-so.ch/record/3433","raw_type":"Text"},"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.4300000071525574}],"awards":[],"funders":[{"id":"https://openalex.org/F4320326610","display_name":"Haute \u00e9cole Sp\u00e9cialis\u00e9e de Suisse Occidentale","ror":"https://ror.org/03r5zec51"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2068104961.pdf","grobid_xml":"https://content.openalex.org/works/W2068104961.grobid-xml"},"referenced_works_count":7,"referenced_works":["https://openalex.org/W1529535786","https://openalex.org/W1651324627","https://openalex.org/W1994993486","https://openalex.org/W2049618516","https://openalex.org/W2113755305","https://openalex.org/W2122978030","https://openalex.org/W2168934541"],"related_works":["https://openalex.org/W1564576805","https://openalex.org/W2096844293","https://openalex.org/W2363944576","https://openalex.org/W3186016800","https://openalex.org/W2351041855","https://openalex.org/W2570254841","https://openalex.org/W2742986847","https://openalex.org/W4387677135","https://openalex.org/W3013148820","https://openalex.org/W2375834862"],"abstract_inverted_index":{"In":[0],"recent":[1],"years":[2],"two":[3,44,60,86],"main":[4],"platforms":[5,61,87],"emerged":[6],"as":[7],"powerful":[8],"key":[9],"players":[10],"in":[11,45,140],"the":[12,43,46,59,85,101,108,132,135,173],"domain":[13],"of":[14,26,58,73,103,111,116,134,147],"parallel":[15],"computing:":[16],"GPUs":[17],"and":[18,24,38,75,96,122,152],"FPGAs.":[19],"Many":[20],"researches":[21],"investigate":[22],"interaction":[23,57],"benefits":[25],"coupling":[27],"them":[28],"with":[29,88],"a":[30,117,123,148,153,158],"general":[31],"purpose":[32],"processor":[33],"(CPU),":[34],"but":[35],"very":[36,40],"few,":[37],"only":[39],"recently,":[41],"integrate":[42],"same":[47],"computational":[48],"system.":[49],"Even":[50],"less":[51],"research":[52],"are":[53,170],"focusing":[54],"on":[55,162],"direct":[56,81],"[1].":[62],"This":[63],"paper":[64,142],"presents":[65],"an":[66,112,120,143],"open":[67,113],"source":[68,114],"framework":[69],"enabling":[70],"easy":[71],"integration":[72],"GPU":[74,124,150],"FPGA":[76,121,154],"resources;":[77],"Our":[78],"work":[79],"provides":[80,126],"data":[82,94,167],"transfer":[83],"between":[84],"minimal":[89],"CPU":[90],"coordination":[91],"at":[92,100],"high":[93],"rate":[95,168],"low":[97],"latency.":[98],"Finally,":[99],"best":[102],"our":[104],"knowledge,":[105],"this":[106,141,163],"is":[107],"first":[109],"proposition":[110],"implementation":[115,145,164],"system":[118],"including":[119],"that":[125,169],"code":[127],"for":[128],"both":[129],"sides.":[130],"Notwithstanding":[131],"generality":[133],"presented":[136],"framework,":[137],"we":[138],"present":[139],"actual":[144],"consisting":[146],"single":[149],"board":[151,155],"connected":[156],"through":[157],"PCIe":[159],"link.":[160],"Measures":[161],"demonstrate":[165],"achieved":[166],"close":[171],"to":[172],"theoretical":[174],"maximum.":[175]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}