{"id":"https://openalex.org/W2051925053","doi":"https://doi.org/10.1109/reconfig.2013.6732278","title":"Distributed execution of transmural electrophysiological imaging with CPU, GPU, and FPGA","display_name":"Distributed execution of transmural electrophysiological imaging with CPU, GPU, and FPGA","publication_year":2013,"publication_date":"2013-12-01","ids":{"openalex":"https://openalex.org/W2051925053","doi":"https://doi.org/10.1109/reconfig.2013.6732278","mag":"2051925053"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig.2013.6732278","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2013.6732278","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068953697","display_name":"Sam Skalicky","orcid":null},"institutions":[{"id":"https://openalex.org/I155173764","display_name":"Rochester Institute of Technology","ror":"https://ror.org/00v4yb702","country_code":"US","type":"education","lineage":["https://openalex.org/I155173764"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Sam Skalicky","raw_affiliation_strings":["Department of Computer Engineering, Rochester Institute of Technology, Rochester, NY, USA","Dept. of Comput. Eng., Rochester Inst. of Technol. Rochester, Rochester, NY, , USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Rochester Institute of Technology, Rochester, NY, USA","institution_ids":["https://openalex.org/I155173764"]},{"raw_affiliation_string":"Dept. of Comput. Eng., Rochester Inst. of Technol. Rochester, Rochester, NY, , USA","institution_ids":["https://openalex.org/I155173764"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071730120","display_name":"Sonia Mart\u00edn\u2010L\u00f3pez","orcid":"https://orcid.org/0000-0001-5203-6206"},"institutions":[{"id":"https://openalex.org/I155173764","display_name":"Rochester Institute of Technology","ror":"https://ror.org/00v4yb702","country_code":"US","type":"education","lineage":["https://openalex.org/I155173764"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sonia Lopez","raw_affiliation_strings":["Department of Computer Engineering, Rochester Institute of Technology, Rochester, NY, USA","Dept. of Comput. Eng., Rochester Inst. of Technol. Rochester, Rochester, NY, , USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Rochester Institute of Technology, Rochester, NY, USA","institution_ids":["https://openalex.org/I155173764"]},{"raw_affiliation_string":"Dept. of Comput. Eng., Rochester Inst. of Technol. Rochester, Rochester, NY, , USA","institution_ids":["https://openalex.org/I155173764"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071708090","display_name":"Marcin \u0141ukowiak","orcid":null},"institutions":[{"id":"https://openalex.org/I155173764","display_name":"Rochester Institute of Technology","ror":"https://ror.org/00v4yb702","country_code":"US","type":"education","lineage":["https://openalex.org/I155173764"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Marcin Lukowiak","raw_affiliation_strings":["Department of Computer Engineering, Rochester Institute of Technology, Rochester, NY, USA","Dept. of Comput. Eng., Rochester Inst. of Technol. Rochester, Rochester, NY, , USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Rochester Institute of Technology, Rochester, NY, USA","institution_ids":["https://openalex.org/I155173764"]},{"raw_affiliation_string":"Dept. of Comput. Eng., Rochester Inst. of Technol. Rochester, Rochester, NY, , USA","institution_ids":["https://openalex.org/I155173764"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5068953697"],"corresponding_institution_ids":["https://openalex.org/I155173764"],"apc_list":null,"apc_paid":null,"fwci":0.3997,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.64515229,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"6310","issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10217","display_name":"Cardiac electrophysiology and arrhythmias","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2705","display_name":"Cardiology and Cardiovascular Medicine"},"field":{"id":"https://openalex.org/fields/27","display_name":"Medicine"},"domain":{"id":"https://openalex.org/domains/4","display_name":"Health Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9952999949455261,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8437926769256592},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7998145818710327},{"id":"https://openalex.org/keywords/central-processing-unit","display_name":"Central processing unit","score":0.6755996942520142},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.6617117524147034},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.6543302536010742},{"id":"https://openalex.org/keywords/cpu-shielding","display_name":"CPU shielding","score":0.6289942264556885},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5379942059516907},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4703550338745117},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.4434248208999634},{"id":"https://openalex.org/keywords/symmetric-multiprocessor-system","display_name":"Symmetric multiprocessor system","score":0.4404180347919464},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.418264776468277},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4147830903530121}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8437926769256592},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7998145818710327},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.6755996942520142},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.6617117524147034},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.6543302536010742},{"id":"https://openalex.org/C180613757","wikidata":"https://www.wikidata.org/wiki/Q5013757","display_name":"CPU shielding","level":3,"score":0.6289942264556885},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5379942059516907},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4703550338745117},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.4434248208999634},{"id":"https://openalex.org/C172430144","wikidata":"https://www.wikidata.org/wiki/Q17111997","display_name":"Symmetric multiprocessor system","level":2,"score":0.4404180347919464},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.418264776468277},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4147830903530121},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/reconfig.2013.6732278","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2013.6732278","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W53102941","https://openalex.org/W1543808094","https://openalex.org/W1978252319","https://openalex.org/W2031344785","https://openalex.org/W2045289186","https://openalex.org/W2063532530","https://openalex.org/W2064712527","https://openalex.org/W2103371021","https://openalex.org/W2132367502","https://openalex.org/W2138336319","https://openalex.org/W2138669011","https://openalex.org/W2143828148","https://openalex.org/W2145055833","https://openalex.org/W2168934541","https://openalex.org/W2271934614","https://openalex.org/W2545224791","https://openalex.org/W6632461508","https://openalex.org/W6694197373"],"related_works":["https://openalex.org/W2387982802","https://openalex.org/W4318187686","https://openalex.org/W4386322366","https://openalex.org/W4294069467","https://openalex.org/W4200045707","https://openalex.org/W2350289853","https://openalex.org/W2391126280","https://openalex.org/W2330590072","https://openalex.org/W3080250604","https://openalex.org/W2224054022"],"abstract_inverted_index":{"One":[0],"of":[1,5,20,25,54,58,78,90,105,114,145,160,170,228],"the":[2,13,17,56,62,76,102,112,143,158,161,164,168,193,200],"main":[3],"challenges":[4],"using":[6,61,106,203],"cutting":[7,132],"edge":[8,133],"medical":[9,134],"imaging":[10,119,135],"applications":[11,27,59],"in":[12,45,221],"clinical":[14],"setting":[15],"is":[16],"large":[18,36],"amount":[19],"data":[21,37,162],"processing":[22],"required.":[23],"Many":[24],"these":[26],"are":[28,52,72],"based":[29],"on":[30,35,157],"linear":[31],"algebra":[32],"computations":[33,176],"operating":[34],"sizes":[38],"and":[39,94,127,218,233],"their":[40],"execution":[41,113,194],"may":[42],"require":[43],"days":[44],"a":[46,115,122,138,179,182,222,226,239],"standard":[47,123],"CPU.":[48],"Distributed":[49],"heterogeneous":[50,183],"systems":[51,237],"capable":[53],"improving":[55],"performance":[57,103],"by":[60,196],"right":[63],"computation-to-hardware":[64],"mapping.":[65],"To":[66],"achieve":[67],"high":[68],"performance,":[69],"hardware":[70,108,188],"platforms":[71,109,189,220],"chosen":[73],"to":[74,110,173,199,230,236],"satisfy":[75],"needs":[77],"each":[79],"computation":[80,148],"with":[81,125,185,238],"corresponding":[82],"architectural":[83],"features":[84],"such":[85],"as":[86,137],"clock":[87],"speed,":[88],"number":[89],"parallel":[91],"computational":[92],"units,":[93],"memory":[95],"bandwidth.":[96],"In":[97,208],"this":[98,131],"paper":[99],"we":[100,141],"evaluate":[101],"benefits":[104],"different":[107],"accelerate":[111],"transmural":[116],"electro":[117],"physiological":[118],"algorithm,":[120],"targeting":[121],"CPU":[124],"GPU":[126],"FPGA":[128,172,219,244],"accelerators.":[129],"Using":[130],"application":[136,165],"case":[139],"study,":[140],"demonstrate":[142],"importance":[144],"making":[146],"intelligent":[147],"assignments":[149],"for":[150],"improved":[151],"performance.":[152],"We":[153],"show":[154,213],"that,":[155],"depending":[156],"size":[159],"structures":[163],"works":[166],"with,":[167],"usage":[169],"an":[171],"run":[174],"certain":[175],"can":[177,191],"make":[178],"big":[180],"difference:":[181],"system":[184,224],"all":[186],"three":[187],"(CPU+GPU+FPGA)":[190],"cut":[192],"time":[195],"half,":[197],"compared":[198,235],"best":[201],"result":[202],"one":[204],"single":[205,223,240],"accelerator":[206],"(CPU+GPU).":[207],"addition,":[209],"our":[210],"experimental":[211],"results":[212],"that":[214],"combining":[215],"CPU,":[216,241],"GPU,":[217,242],"achieves":[225],"speedup":[227],"up":[229],"62\u00d7,":[231],"2\u00d7,":[232],"1605\u00d7":[234],"or":[243],"platform":[245],"respectively.":[246]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
