{"id":"https://openalex.org/W2046862257","doi":"https://doi.org/10.1109/reconfig.2013.6732260","title":"A hardware pipelined architecture of a scalable Montgomery modular multiplier over GF(2&lt;sup&gt;m&lt;/sup&gt;)","display_name":"A hardware pipelined architecture of a scalable Montgomery modular multiplier over GF(2&lt;sup&gt;m&lt;/sup&gt;)","publication_year":2013,"publication_date":"2013-12-01","ids":{"openalex":"https://openalex.org/W2046862257","doi":"https://doi.org/10.1109/reconfig.2013.6732260","mag":"2046862257"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig.2013.6732260","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2013.6732260","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025573196","display_name":"Guillaume Reymond","orcid":null},"institutions":[{"id":"https://openalex.org/I2738703131","display_name":"Commissariat \u00e0 l'\u00c9nergie Atomique et aux \u00c9nergies Alternatives","ror":"https://ror.org/00jjx8s55","country_code":"FR","type":"funder","lineage":["https://openalex.org/I2738703131"]},{"id":"https://openalex.org/I4210112016","display_name":"Institut des Mat\u00e9riaux, de Micro\u00e9lectronique et des Nanosciences de Provence","ror":"https://ror.org/0238zyh04","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I143002897","https://openalex.org/I21491767","https://openalex.org/I3132279224","https://openalex.org/I4210098836","https://openalex.org/I4210112016"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Guillaume Reymond","raw_affiliation_strings":["CEA - Centre de Micro\u00e9lectronique de Provence, Secure Architectures and Systems Laboratory, Gardanne, France","CEA - Centre de Microelectron. de Provence, Secure Archit. & Syst. Lab., Gardanne, France"],"affiliations":[{"raw_affiliation_string":"CEA - Centre de Micro\u00e9lectronique de Provence, Secure Architectures and Systems Laboratory, Gardanne, France","institution_ids":["https://openalex.org/I4210112016","https://openalex.org/I2738703131"]},{"raw_affiliation_string":"CEA - Centre de Microelectron. de Provence, Secure Archit. & Syst. Lab., Gardanne, France","institution_ids":["https://openalex.org/I4210112016","https://openalex.org/I2738703131"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5083712171","display_name":"Victor Murillo","orcid":null},"institutions":[{"id":"https://openalex.org/I4210112016","display_name":"Institut des Mat\u00e9riaux, de Micro\u00e9lectronique et des Nanosciences de Provence","ror":"https://ror.org/0238zyh04","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I143002897","https://openalex.org/I21491767","https://openalex.org/I3132279224","https://openalex.org/I4210098836","https://openalex.org/I4210112016"]},{"id":"https://openalex.org/I2738703131","display_name":"Commissariat \u00e0 l'\u00c9nergie Atomique et aux \u00c9nergies Alternatives","ror":"https://ror.org/00jjx8s55","country_code":"FR","type":"funder","lineage":["https://openalex.org/I2738703131"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Victor Murillo","raw_affiliation_strings":["CEA - Centre de Micro\u00e9lectronique de Provence, Secure Architectures and Systems Laboratory, Gardanne, France","CEA - Centre de Microelectron. de Provence, Secure Archit. & Syst. Lab., Gardanne, France"],"affiliations":[{"raw_affiliation_string":"CEA - Centre de Micro\u00e9lectronique de Provence, Secure Architectures and Systems Laboratory, Gardanne, France","institution_ids":["https://openalex.org/I4210112016","https://openalex.org/I2738703131"]},{"raw_affiliation_string":"CEA - Centre de Microelectron. de Provence, Secure Archit. & Syst. Lab., Gardanne, France","institution_ids":["https://openalex.org/I4210112016","https://openalex.org/I2738703131"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5025573196"],"corresponding_institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210112016"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.17439465,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"21","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10237","display_name":"Cryptography and Data Security","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.7704377770423889},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.7396295070648193},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7073172330856323},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6837903261184692},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.6548011898994446},{"id":"https://openalex.org/keywords/modular-arithmetic","display_name":"Modular arithmetic","score":0.6499686241149902},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.5816741585731506},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.5478909611701965},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5078268647193909},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.5044764280319214},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.46793147921562195},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.42101195454597473},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3998059332370758},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3632168769836426},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.32312893867492676},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.14514288306236267},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.11617538332939148}],"concepts":[{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.7704377770423889},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.7396295070648193},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7073172330856323},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6837903261184692},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.6548011898994446},{"id":"https://openalex.org/C32049820","wikidata":"https://www.wikidata.org/wiki/Q319400","display_name":"Modular arithmetic","level":3,"score":0.6499686241149902},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.5816741585731506},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.5478909611701965},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5078268647193909},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.5044764280319214},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.46793147921562195},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.42101195454597473},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3998059332370758},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3632168769836426},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32312893867492676},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.14514288306236267},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.11617538332939148},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/reconfig.2013.6732260","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2013.6732260","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W151012941","https://openalex.org/W260615880","https://openalex.org/W1499231268","https://openalex.org/W1536578317","https://openalex.org/W1558771847","https://openalex.org/W1880212920","https://openalex.org/W1950989567","https://openalex.org/W1996360405","https://openalex.org/W2003736153","https://openalex.org/W2004814164","https://openalex.org/W2019027244","https://openalex.org/W2036378739","https://openalex.org/W2076775530","https://openalex.org/W2082919005","https://openalex.org/W2097601417","https://openalex.org/W2103774873","https://openalex.org/W2113287980","https://openalex.org/W2118738175","https://openalex.org/W2136870067","https://openalex.org/W2140850958","https://openalex.org/W2149204794","https://openalex.org/W2156186849","https://openalex.org/W2780394256","https://openalex.org/W4211076402","https://openalex.org/W4232836212","https://openalex.org/W4237773356","https://openalex.org/W6606249822","https://openalex.org/W6630007988","https://openalex.org/W6671316235"],"related_works":["https://openalex.org/W2109699519","https://openalex.org/W970262775","https://openalex.org/W1831618318","https://openalex.org/W2006568360","https://openalex.org/W4244724753","https://openalex.org/W2059591361","https://openalex.org/W2058965144","https://openalex.org/W1580755070","https://openalex.org/W1886625815","https://openalex.org/W2353466882"],"abstract_inverted_index":{"Computing":[0],"modular":[1,29],"multiplication":[2],"over":[3,31],"GF(2":[4],"<sup":[5],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[6],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">m</sup>":[7],")":[8],"is":[9,55],"often":[10],"a":[11,24,38,75,79],"performance":[12],"critical":[13],"operation":[14],"in":[15],"cryptographic":[16],"applications.":[17],"This":[18,34],"paper":[19],"describes":[20],"the":[21,44,49,52,65],"architecture":[22],"of":[23,51],"scalable":[25],"and":[26],"configurable":[27],"Montgomery":[28],"multiplier":[30],"binary":[32],"fields.":[33],"architecture,":[35],"implemented":[36],"on":[37],"FPGA":[39],"platform,":[40],"aims":[41],"to":[42,48,59,73],"reduce":[43],"computation":[45],"time":[46],"thanks":[47],"pipelining":[50],"datapath.":[53],"Scalability":[54],"achieved":[56],"by":[57],"allowing":[58],"change":[60],"field":[61],"parameters":[62],"while":[63],"keeping":[64],"same":[66],"design.":[67],"A":[68],"timing":[69],"area":[70],"tradeoff":[71],"allows":[72],"get":[74],"significant":[76],"speedup":[77],"at":[78],"reasonable":[80],"cost.":[81]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
