{"id":"https://openalex.org/W2015575882","doi":"https://doi.org/10.1109/reconfig.2013.6732259","title":"A framework for PC applications with portable and scalable FPGA accelerators","display_name":"A framework for PC applications with portable and scalable FPGA accelerators","publication_year":2013,"publication_date":"2013-12-01","ids":{"openalex":"https://openalex.org/W2015575882","doi":"https://doi.org/10.1109/reconfig.2013.6732259","mag":"2015575882"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig.2013.6732259","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2013.6732259","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5081481315","display_name":"Markus Weinhardt","orcid":"https://orcid.org/0000-0003-1445-1382"},"institutions":[{"id":"https://openalex.org/I4210159638","display_name":"Hochschule Osnabr\u00fcck","ror":"https://ror.org/059vymd37","country_code":"DE","type":"education","lineage":["https://openalex.org/I4210159638"]},{"id":"https://openalex.org/I170658231","display_name":"Osnabr\u00fcck University","ror":"https://ror.org/04qmmjx98","country_code":"DE","type":"education","lineage":["https://openalex.org/I170658231"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Markus Weinhardt","raw_affiliation_strings":["Osnabr\u00fcck University of Applied Sciences, Osnabr\u00fcck, Germany","Osnabruck Univ. of Appl. Sci., Osnabru\u0308ck, Germany"],"affiliations":[{"raw_affiliation_string":"Osnabr\u00fcck University of Applied Sciences, Osnabr\u00fcck, Germany","institution_ids":["https://openalex.org/I4210159638"]},{"raw_affiliation_string":"Osnabruck Univ. of Appl. Sci., Osnabru\u0308ck, Germany","institution_ids":["https://openalex.org/I170658231"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083367302","display_name":"Alexander Krieger","orcid":null},"institutions":[{"id":"https://openalex.org/I4210159638","display_name":"Hochschule Osnabr\u00fcck","ror":"https://ror.org/059vymd37","country_code":"DE","type":"education","lineage":["https://openalex.org/I4210159638"]},{"id":"https://openalex.org/I170658231","display_name":"Osnabr\u00fcck University","ror":"https://ror.org/04qmmjx98","country_code":"DE","type":"education","lineage":["https://openalex.org/I170658231"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Alexander Krieger","raw_affiliation_strings":["Osnabr\u00fcck University of Applied Sciences, Osnabr\u00fcck, Germany","Osnabruck Univ. of Appl. Sci., Osnabru\u0308ck, Germany"],"affiliations":[{"raw_affiliation_string":"Osnabr\u00fcck University of Applied Sciences, Osnabr\u00fcck, Germany","institution_ids":["https://openalex.org/I4210159638"]},{"raw_affiliation_string":"Osnabruck Univ. of Appl. Sci., Osnabru\u0308ck, Germany","institution_ids":["https://openalex.org/I170658231"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031223120","display_name":"Thomas Kinder","orcid":null},"institutions":[{"id":"https://openalex.org/I170658231","display_name":"Osnabr\u00fcck University","ror":"https://ror.org/04qmmjx98","country_code":"DE","type":"education","lineage":["https://openalex.org/I170658231"]},{"id":"https://openalex.org/I4210159638","display_name":"Hochschule Osnabr\u00fcck","ror":"https://ror.org/059vymd37","country_code":"DE","type":"education","lineage":["https://openalex.org/I4210159638"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Thomas Kinder","raw_affiliation_strings":["Osnabr\u00fcck University of Applied Sciences, Osnabr\u00fcck, Germany","Osnabruck Univ. of Appl. Sci., Osnabru\u0308ck, Germany"],"affiliations":[{"raw_affiliation_string":"Osnabr\u00fcck University of Applied Sciences, Osnabr\u00fcck, Germany","institution_ids":["https://openalex.org/I4210159638"]},{"raw_affiliation_string":"Osnabruck Univ. of Appl. Sci., Osnabru\u0308ck, Germany","institution_ids":["https://openalex.org/I170658231"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5081481315"],"corresponding_institution_ids":["https://openalex.org/I170658231","https://openalex.org/I4210159638"],"apc_list":null,"apc_paid":null,"fwci":0.9456,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.75225426,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"12","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8527626991271973},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8368905782699585},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6901695132255554},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5937663912773132},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.5881556272506714},{"id":"https://openalex.org/keywords/pci-express","display_name":"PCI Express","score":0.5769393444061279},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.5617464184761047},{"id":"https://openalex.org/keywords/fpga-prototype","display_name":"FPGA prototype","score":0.4909537136554718},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.46690231561660767},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.42015784978866577},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.39558035135269165},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.16466566920280457}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8527626991271973},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8368905782699585},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6901695132255554},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5937663912773132},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.5881556272506714},{"id":"https://openalex.org/C64270927","wikidata":"https://www.wikidata.org/wiki/Q206924","display_name":"PCI Express","level":3,"score":0.5769393444061279},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.5617464184761047},{"id":"https://openalex.org/C203864433","wikidata":"https://www.wikidata.org/wiki/Q5426992","display_name":"FPGA prototype","level":3,"score":0.4909537136554718},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.46690231561660767},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.42015784978866577},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.39558035135269165},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.16466566920280457},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/reconfig.2013.6732259","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2013.6732259","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320329560","display_name":"Universit\u00e4t Osnabr\u00fcck","ror":"https://ror.org/04qmmjx98"},{"id":"https://openalex.org/F4320335322","display_name":"European Regional Development Fund","ror":"https://ror.org/00k4n6c32"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1529535786","https://openalex.org/W1567363020","https://openalex.org/W1997358129","https://openalex.org/W2019660355","https://openalex.org/W2025572466","https://openalex.org/W2040041833","https://openalex.org/W2046964635","https://openalex.org/W2094328689","https://openalex.org/W2095993144","https://openalex.org/W2125703639","https://openalex.org/W2166015306","https://openalex.org/W2170049777","https://openalex.org/W2480186183"],"related_works":["https://openalex.org/W1564576805","https://openalex.org/W2998132311","https://openalex.org/W2113648965","https://openalex.org/W2155484023","https://openalex.org/W4200391368","https://openalex.org/W2388221044","https://openalex.org/W2984236338","https://openalex.org/W2619213283","https://openalex.org/W3117064361","https://openalex.org/W2057745131"],"abstract_inverted_index":{"This":[0,62],"paper":[1],"presents":[2],"a":[3,56,137,143,153,161],"novel":[4],"framework":[5,108],"for":[6,59,152],"implementing":[7],"portable":[8,116],"and":[9,29,38,89,101,117,127,173],"scalable":[10,118],"data-intensive":[11],"applications":[12,50],"on":[13,26,68,149],"reconfigurable":[14],"hardware.":[15],"Instead":[16],"of":[17,110,147,182],"using":[18,55],"expensive":[19],"\u201creconfigurable":[20],"supercomputers\u201d,":[21],"we":[22,43],"focus":[23],"our":[24,41,183],"work":[25],"standard":[27],"PCs":[28,69],"PCI-Express":[30],"extension":[31],"cards":[32],"featuring":[33],"Field-Programmable":[34],"Gate":[35],"Arrays":[36],"(FPGAs)":[37],"memory.":[39],"In":[40],"framework,":[42],"exploit":[44,99],"task-level":[45],"parallelism":[46,148],"by":[47],"manually":[48],"partitioning":[49],"into":[51],"several":[52],"parallel":[53],"tasks":[54,94],"communication":[57,168],"API":[58,81],"data":[60,84],"streams.":[61],"also":[63,135],"allows":[64],"pure":[65],"software":[66],"implementations":[67],"without":[70],"FPGA":[71,75,151,175],"cards.":[72],"If":[73],"an":[74,150],"accelerator":[76],"is":[77],"present,":[78],"the":[79,86,90,93,107,125,131,166,171,174,180],"same":[80],"calls":[82],"transfer":[83],"between":[85,170],"PC's":[87],"CPU":[88],"FPGA.":[91],"Then,":[92],"implemented":[95],"in":[96],"hardware":[97,111,122,155,162],"can":[98],"instruction-level":[100],"pipelining":[102],"parallelsims":[103],"as":[104],"well.":[105],"Furthermore,":[106],"consists":[109],"implementation":[112],"rules":[113],"which":[114,164],"enable":[115],"designs.":[119],"Device":[120],"specific":[121],"wrappers":[123],"hide":[124],"FPGA's":[126],"board's":[128],"idiosyncrasies":[129],"from":[130],"application":[132],"developer.":[133],"We":[134],"present":[136],"new":[138],"method":[139],"to":[140,159],"automatically":[141],"select":[142],"task's":[144],"optimal":[145],"degree":[146],"given":[154],"platform,":[156],"i.":[157],"e.":[158],"generate":[160],"design":[163],"uses":[165],"available":[167],"bandwidth":[169],"PC":[172],"optimally.":[176],"Experimental":[177],"results":[178],"show":[179],"feasibility":[181],"approach.":[184]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
