{"id":"https://openalex.org/W2050402383","doi":"https://doi.org/10.1109/reconfig.2013.6732253","title":"Keynote 1 \u2014 Moore's law, programmable logic and reconfigurable systems","display_name":"Keynote 1 \u2014 Moore's law, programmable logic and reconfigurable systems","publication_year":2013,"publication_date":"2013-12-01","ids":{"openalex":"https://openalex.org/W2050402383","doi":"https://doi.org/10.1109/reconfig.2013.6732253","mag":"2050402383"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig.2013.6732253","is_oa":true,"landing_page_url":"https://doi.org/10.1109/reconfig.2013.6732253","pdf_url":"https://ieeexplore.ieee.org/ielx7/6720231/6732246/06732253.pdf","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://ieeexplore.ieee.org/ielx7/6720231/6732246/06732253.pdf","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111830282","display_name":"Steve Trimberger","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Steve Trimberger","raw_affiliation_strings":["Xilinx Labs"],"affiliations":[{"raw_affiliation_string":"Xilinx Labs","institution_ids":["https://openalex.org/I32923980"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5111830282"],"corresponding_institution_ids":["https://openalex.org/I32923980"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.11400768,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"1"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9664999842643738,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9664999842643738,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12784","display_name":"Modular Robots and Swarm Intelligence","score":0.9520000219345093,"subfield":{"id":"https://openalex.org/subfields/2210","display_name":"Mechanical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.7996248006820679},{"id":"https://openalex.org/keywords/simple-programmable-logic-device","display_name":"Simple programmable logic device","score":0.7564947605133057},{"id":"https://openalex.org/keywords/programmable-array-logic","display_name":"Programmable Array Logic","score":0.7355416417121887},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7062846422195435},{"id":"https://openalex.org/keywords/programmable-logic-array","display_name":"Programmable logic array","score":0.6548517942428589},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5856267809867859},{"id":"https://openalex.org/keywords/moores-law","display_name":"Moore's law","score":0.5687955021858215},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5318509936332703},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5011751651763916},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.49140822887420654},{"id":"https://openalex.org/keywords/erasable-programmable-logic-device","display_name":"Erasable programmable logic device","score":0.48676633834838867},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.4731872081756592},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4431280493736267},{"id":"https://openalex.org/keywords/programmable-logic-controller","display_name":"Programmable logic controller","score":0.43424245715141296},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.33985525369644165},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3082943558692932},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.29174643754959106}],"concepts":[{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.7996248006820679},{"id":"https://openalex.org/C34370810","wikidata":"https://www.wikidata.org/wiki/Q3961319","display_name":"Simple programmable logic device","level":5,"score":0.7564947605133057},{"id":"https://openalex.org/C113323844","wikidata":"https://www.wikidata.org/wiki/Q1378651","display_name":"Programmable Array Logic","level":5,"score":0.7355416417121887},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7062846422195435},{"id":"https://openalex.org/C182322920","wikidata":"https://www.wikidata.org/wiki/Q2112217","display_name":"Programmable logic array","level":3,"score":0.6548517942428589},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5856267809867859},{"id":"https://openalex.org/C206891323","wikidata":"https://www.wikidata.org/wiki/Q178655","display_name":"Moore's law","level":2,"score":0.5687955021858215},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5318509936332703},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5011751651763916},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.49140822887420654},{"id":"https://openalex.org/C110050671","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Erasable programmable logic device","level":5,"score":0.48676633834838867},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.4731872081756592},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4431280493736267},{"id":"https://openalex.org/C37374048","wikidata":"https://www.wikidata.org/wiki/Q188674","display_name":"Programmable logic controller","level":2,"score":0.43424245715141296},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.33985525369644165},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3082943558692932},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.29174643754959106},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/reconfig.2013.6732253","is_oa":true,"landing_page_url":"https://doi.org/10.1109/reconfig.2013.6732253","pdf_url":"https://ieeexplore.ieee.org/ielx7/6720231/6732246/06732253.pdf","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1109/reconfig.2013.6732253","is_oa":true,"landing_page_url":"https://doi.org/10.1109/reconfig.2013.6732253","pdf_url":"https://ieeexplore.ieee.org/ielx7/6720231/6732246/06732253.pdf","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2050402383.pdf","grobid_xml":"https://content.openalex.org/works/W2050402383.grobid-xml"},"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W1528933814","https://openalex.org/W3013792460","https://openalex.org/W3117015220","https://openalex.org/W1904803855","https://openalex.org/W3022525969","https://openalex.org/W2376859467","https://openalex.org/W133576369","https://openalex.org/W4389045693","https://openalex.org/W2764789987","https://openalex.org/W2050402383"],"abstract_inverted_index":{"Summary":[0],"form":[1],"only":[2],"given.":[3],"Moore's":[4],"Law":[5],"continues,":[6],"but":[7],"for":[8,39,82,93,106],"how":[9],"long?":[10],"Many":[11],"are":[12,27,47,54,65],"predicting":[13],"the":[14,19,56,69,88,107,112],"end,":[15],"or":[16],"at":[17],"least":[18],"slowing,":[20],"of":[21,109,114],"semiconductor":[22],"scaling":[23],"even":[24],"as":[25,33],"FinFETs":[26],"being":[28,66],"introduced.":[29],"New":[30],"technologies,":[31],"such":[32],"3D":[34],"integration,":[35],"offer":[36],"new":[37,80],"opportunities":[38,92],"silicon":[40],"vendors":[41,53,96],"and":[42,62,71,91,97,102],"customers.":[43],"These":[44,77],"technology":[45],"trends":[46,101],"converging":[48],"on":[49,118],"Programmable":[50],"Logic.":[51],"FPGA":[52],"changing":[55],"way":[57],"they":[58,104],"build":[59],"their":[60],"products":[61,78],"those":[63,75],"changes":[64],"reflected":[67],"in":[68],"architecture":[70],"tools":[72],"that":[73],"surround":[74],"products.":[76],"enable":[79],"capabilities":[81],"reconfigurable":[83,115],"systems.":[84],"This":[85],"talk":[86],"describes":[87],"technological":[89],"pressures":[90],"programmable":[94,110],"logic":[95,111],"highlights":[98],"recent":[99],"product":[100],"what":[103],"indicate":[105],"future":[108,113],"systems":[116],"built":[117],"it.":[119]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
