{"id":"https://openalex.org/W1965576977","doi":"https://doi.org/10.1109/reconfig.2012.6416756","title":"A High-Performance Reconfigurable Computing architecture using a magnetic configuration memory","display_name":"A High-Performance Reconfigurable Computing architecture using a magnetic configuration memory","publication_year":2012,"publication_date":"2012-12-01","ids":{"openalex":"https://openalex.org/W1965576977","doi":"https://doi.org/10.1109/reconfig.2012.6416756","mag":"1965576977"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig.2012.6416756","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2012.6416756","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 International Conference on Reconfigurable Computing and FPGAs","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100761448","display_name":"V\u00edtor Silva","orcid":"https://orcid.org/0000-0003-2439-1184"},"institutions":[{"id":"https://openalex.org/I121345201","display_name":"Instituto de Engenharia de Sistemas e Computadores Investiga\u00e7\u00e3o e Desenvolvimento","ror":"https://ror.org/04mqy3p58","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I121345201","https://openalex.org/I4210125590"]}],"countries":["PT"],"is_corresponding":true,"raw_author_name":"Victor Silva","raw_affiliation_strings":["INESC-ID/IST/UTL, Lisboa, Portugal","INESC-ID, IST, UTL, Lisbon, Portugal#TAB#"],"affiliations":[{"raw_affiliation_string":"INESC-ID/IST/UTL, Lisboa, Portugal","institution_ids":["https://openalex.org/I121345201"]},{"raw_affiliation_string":"INESC-ID, IST, UTL, Lisbon, Portugal#TAB#","institution_ids":["https://openalex.org/I121345201"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047549981","display_name":"Jorge Fernandes","orcid":"https://orcid.org/0000-0002-4916-5637"},"institutions":[{"id":"https://openalex.org/I121345201","display_name":"Instituto de Engenharia de Sistemas e Computadores Investiga\u00e7\u00e3o e Desenvolvimento","ror":"https://ror.org/04mqy3p58","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I121345201","https://openalex.org/I4210125590"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Jorge R. Fernandes","raw_affiliation_strings":["INESC-ID/IST/UTL, Lisboa, Portugal","INESC-ID, IST, UTL, Lisbon, Portugal#TAB#"],"affiliations":[{"raw_affiliation_string":"INESC-ID/IST/UTL, Lisboa, Portugal","institution_ids":["https://openalex.org/I121345201"]},{"raw_affiliation_string":"INESC-ID, IST, UTL, Lisbon, Portugal#TAB#","institution_ids":["https://openalex.org/I121345201"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003178960","display_name":"M\u00e1rio V\u00e9stias","orcid":"https://orcid.org/0000-0001-8556-4507"},"institutions":[{"id":"https://openalex.org/I121345201","display_name":"Instituto de Engenharia de Sistemas e Computadores Investiga\u00e7\u00e3o e Desenvolvimento","ror":"https://ror.org/04mqy3p58","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I121345201","https://openalex.org/I4210125590"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Mario P. Vestias","raw_affiliation_strings":["INESC-ID/ISEL/IPL, Lisboa, Portugal","INESC-ID/ISEL/IPL, Lisbon, Portugal"],"affiliations":[{"raw_affiliation_string":"INESC-ID/ISEL/IPL, Lisboa, Portugal","institution_ids":["https://openalex.org/I121345201"]},{"raw_affiliation_string":"INESC-ID/ISEL/IPL, Lisbon, Portugal","institution_ids":["https://openalex.org/I121345201"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062555847","display_name":"Hor\u00e1cio C. Neto","orcid":"https://orcid.org/0000-0002-3621-8322"},"institutions":[{"id":"https://openalex.org/I121345201","display_name":"Instituto de Engenharia de Sistemas e Computadores Investiga\u00e7\u00e3o e Desenvolvimento","ror":"https://ror.org/04mqy3p58","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I121345201","https://openalex.org/I4210125590"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Horacio C. Neto","raw_affiliation_strings":["INESC-ID/IST/UTL, Lisboa, Portugal","INESC-ID, IST, UTL, Lisbon, Portugal#TAB#"],"affiliations":[{"raw_affiliation_string":"INESC-ID/IST/UTL, Lisboa, Portugal","institution_ids":["https://openalex.org/I121345201"]},{"raw_affiliation_string":"INESC-ID, IST, UTL, Lisbon, Portugal#TAB#","institution_ids":["https://openalex.org/I121345201"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5100761448"],"corresponding_institution_ids":["https://openalex.org/I121345201"],"apc_list":null,"apc_paid":null,"fwci":0.5801,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.64315158,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"17","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reconfigurability","display_name":"Reconfigurability","score":0.8490799069404602},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.7819133996963501},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7367710471153259},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4925838112831116},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4895063638687134},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.483432412147522},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.44915100932121277},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.43403956294059753},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.4112960696220398},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09623625874519348}],"concepts":[{"id":"https://openalex.org/C2780149590","wikidata":"https://www.wikidata.org/wiki/Q7302742","display_name":"Reconfigurability","level":2,"score":0.8490799069404602},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.7819133996963501},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7367710471153259},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4925838112831116},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4895063638687134},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.483432412147522},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.44915100932121277},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.43403956294059753},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.4112960696220398},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09623625874519348},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/reconfig.2012.6416756","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2012.6416756","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 International Conference on Reconfigurable Computing and FPGAs","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W173935616","https://openalex.org/W1518736566","https://openalex.org/W1849019737","https://openalex.org/W1887556625","https://openalex.org/W1970866660","https://openalex.org/W1991973578","https://openalex.org/W2004070172","https://openalex.org/W2007606233","https://openalex.org/W2020303656","https://openalex.org/W2025787141","https://openalex.org/W2038165255","https://openalex.org/W2097013438","https://openalex.org/W2097283992","https://openalex.org/W2103214300","https://openalex.org/W2113398246","https://openalex.org/W2117099910","https://openalex.org/W2119327500","https://openalex.org/W2121810137","https://openalex.org/W2124860986","https://openalex.org/W2126107187","https://openalex.org/W2132367502","https://openalex.org/W2142676556","https://openalex.org/W2146363382","https://openalex.org/W2150936902","https://openalex.org/W2157879423","https://openalex.org/W2159747318","https://openalex.org/W2159844683","https://openalex.org/W2160224309","https://openalex.org/W2166062472","https://openalex.org/W6655383007"],"related_works":["https://openalex.org/W2152623100","https://openalex.org/W2096417281","https://openalex.org/W25204318","https://openalex.org/W2077035242","https://openalex.org/W2138895528","https://openalex.org/W3042643149","https://openalex.org/W1999203047","https://openalex.org/W3201977823","https://openalex.org/W2362203107","https://openalex.org/W2084703527"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,7,33,46,83,87,91,105,118],"new":[4],"architecture":[5,42,100],"for":[6,29,32],"coarse-grained":[8],"reconfigurable":[9],"array":[10,89],"targeted":[11],"to":[12,67,103],"linear":[13],"algebra":[14],"problems.":[15],"The":[16,40,55,79],"reconfiguration":[17],"memories":[18],"are":[19,58],"implemented":[20],"using":[21],"magnetic":[22],"tunneling":[23],"junctions.":[24],"These":[25],"storage":[26],"elements":[27],"provide":[28,104,117],"non-volatility":[30],"and":[31,70,75,110],"very":[34,106,119],"effective":[35],"implementation":[36],"of":[37,49,82,86],"multi-context":[38],"planes.":[39],"proposed":[41,99],"is":[43,101],"organized":[44],"as":[45],"2-dimensional":[47],"mesh":[48],"double":[50],"precision":[51],"floating-point":[52],"execution":[53,56,77],"units.":[54,78],"units":[57],"run-time":[59,122],"reconfigurable.":[60],"Its":[61],"configuration":[62,114],"information":[63],"defines":[64],"the":[65,71,98,112],"operation":[66],"be":[68],"executed":[69],"data":[72],"flow":[73],"intra":[74],"inter":[76],"synthesis":[80],"results":[81],"prototype":[84],"design":[85],"4\u00d74":[88],"targeting":[90],"65":[92],"nm":[93],"CMOS":[94],"technology":[95],"confirm":[96],"that":[97,111],"able":[102],"significant":[107],"computational":[108],"density":[109],"magnetic-based":[113],"memory":[115],"can":[116],"area":[120],"efficient":[121],"reconfigurability.":[123]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}