{"id":"https://openalex.org/W1972917870","doi":"https://doi.org/10.1109/rait.2012.6194592","title":"A technique for power reduction of CMOS circuit at 65nm technology","display_name":"A technique for power reduction of CMOS circuit at 65nm technology","publication_year":2012,"publication_date":"2012-03-01","ids":{"openalex":"https://openalex.org/W1972917870","doi":"https://doi.org/10.1109/rait.2012.6194592","mag":"1972917870"},"language":"en","primary_location":{"id":"doi:10.1109/rait.2012.6194592","is_oa":false,"landing_page_url":"https://doi.org/10.1109/rait.2012.6194592","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 1st International Conference on Recent Advances in Information Technology (RAIT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027504677","display_name":"Angshuman Chakraborty","orcid":null},"institutions":[{"id":"https://openalex.org/I196486160","display_name":"National Institute of Technology Agartala","ror":"https://ror.org/03swyrn62","country_code":"IN","type":"education","lineage":["https://openalex.org/I196486160"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Angshuman Chakraborty","raw_affiliation_strings":["Department of Electronics & Communication, NIT Agartala, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics & Communication, NIT Agartala, India","institution_ids":["https://openalex.org/I196486160"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5046717391","display_name":"Sambhu Nath Pradhan","orcid":"https://orcid.org/0000-0002-5461-6535"},"institutions":[{"id":"https://openalex.org/I196486160","display_name":"National Institute of Technology Agartala","ror":"https://ror.org/03swyrn62","country_code":"IN","type":"education","lineage":["https://openalex.org/I196486160"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sambhu Nath Pradhan","raw_affiliation_strings":["Department of Electronics & Communication, NIT Agartala, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics & Communication, NIT Agartala, India","institution_ids":["https://openalex.org/I196486160"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.7495,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.73106517,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"576","last_page":"580"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5989024639129639},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5836896300315857},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5410207509994507},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5375340580940247},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5349375605583191},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5239246487617493},{"id":"https://openalex.org/keywords/leakage-power","display_name":"Leakage power","score":0.5150396823883057},{"id":"https://openalex.org/keywords/stacking","display_name":"Stacking","score":0.5064159631729126},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.4939923882484436},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.4836379289627075},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.47235116362571716},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"Integrated circuit layout","score":0.45854049921035767},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4415627121925354},{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.4384486973285675},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.43019503355026245},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.4255809783935547},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.41964191198349},{"id":"https://openalex.org/keywords/power-optimization","display_name":"Power optimization","score":0.412601113319397},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.39750826358795166},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.35274356603622437},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.34276270866394043},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24007448554039001},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.18933656811714172}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5989024639129639},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5836896300315857},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5410207509994507},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5375340580940247},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5349375605583191},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5239246487617493},{"id":"https://openalex.org/C2987719587","wikidata":"https://www.wikidata.org/wiki/Q1811428","display_name":"Leakage power","level":4,"score":0.5150396823883057},{"id":"https://openalex.org/C33347731","wikidata":"https://www.wikidata.org/wiki/Q285210","display_name":"Stacking","level":2,"score":0.5064159631729126},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.4939923882484436},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.4836379289627075},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.47235116362571716},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.45854049921035767},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4415627121925354},{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.4384486973285675},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.43019503355026245},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.4255809783935547},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.41964191198349},{"id":"https://openalex.org/C168292644","wikidata":"https://www.wikidata.org/wiki/Q10860336","display_name":"Power optimization","level":4,"score":0.412601113319397},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.39750826358795166},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.35274356603622437},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.34276270866394043},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24007448554039001},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.18933656811714172},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C46141821","wikidata":"https://www.wikidata.org/wiki/Q209402","display_name":"Nuclear magnetic resonance","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/rait.2012.6194592","is_oa":false,"landing_page_url":"https://doi.org/10.1109/rait.2012.6194592","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 1st International Conference on Recent Advances in Information Technology (RAIT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W176161998","https://openalex.org/W1598341975","https://openalex.org/W1761143336","https://openalex.org/W1986056825","https://openalex.org/W2008926433","https://openalex.org/W2102014077","https://openalex.org/W2102726266","https://openalex.org/W2109840204","https://openalex.org/W2110134128","https://openalex.org/W2121194013","https://openalex.org/W2122846829","https://openalex.org/W2125858563","https://openalex.org/W2136403269","https://openalex.org/W2138450211","https://openalex.org/W2141263414","https://openalex.org/W2152474731","https://openalex.org/W2171757373","https://openalex.org/W4232776296","https://openalex.org/W4237116014","https://openalex.org/W4248612738","https://openalex.org/W4299319444","https://openalex.org/W6675580108","https://openalex.org/W6844264435"],"related_works":["https://openalex.org/W4378175625","https://openalex.org/W2530008369","https://openalex.org/W2101701496","https://openalex.org/W2339082925","https://openalex.org/W576646735","https://openalex.org/W2207750882","https://openalex.org/W2143954265","https://openalex.org/W4255392205","https://openalex.org/W4252084893","https://openalex.org/W2485892467"],"abstract_inverted_index":{"The":[0,108],"overall":[1,45,69],"power":[2,24,46,70,91],"consumption":[3,25,71],"in":[4,75,90],"nano-scaled":[5],"device":[6,28],"has":[7,95],"reached":[8],"an":[9,61],"alarming":[10],"state":[11],"mainly":[12],"due":[13,31],"to":[14,27,32,52],"the":[15,36,68,76,99,114,117],"increasing":[16],"trend":[17],"of":[18,48,83,116],"various":[19],"leakage":[20,101],"components.":[21],"This":[22],"escalated":[23],"leads":[26],"characteristics":[29],"breakdown":[30],"hot-spot":[33],"creation":[34],"within":[35],"integrated":[37],"Package.":[38],"As":[39],"a":[40,87],"result,":[41],"as":[42,105],"technology":[43],"advances":[44],"dissipation":[47],"VLSI":[49],"circuit":[50,85],"needs":[51],"be":[53],"controlled":[54],"by":[55,72],"power-aware":[56],"design.":[57],"Here":[58],"we":[59,65],"propose":[60],"idea":[62],"through":[63],"which":[64],"can":[66],"reduce":[67],"simple":[73],"modification":[74],"reference":[77],"circuit.":[78],"Pre-layout":[79],"and":[80,110],"post-layout":[81],"simulation":[82],"modified":[84,118],"shows":[86],"significant":[88],"improvement":[89],"consumption.":[92],"Power":[93],"saving":[94],"been":[96],"compared":[97],"with":[98],"existing":[100],"reduction":[102],"technique":[103],"such":[104],"transistor":[106],"stacking.":[107],"area":[109],"delay":[111],"overhead":[112],"for":[113],"implementation":[115],"structure":[119],"are":[120],"very":[121],"less.":[122]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}