{"id":"https://openalex.org/W4415378223","doi":"https://doi.org/10.1109/prime66228.2025.11203705","title":"A Novel 0.4-V Current-Biased Inverter-Based Two-Stage Fully-Synthesizable OTA","display_name":"A Novel 0.4-V Current-Biased Inverter-Based Two-Stage Fully-Synthesizable OTA","publication_year":2025,"publication_date":"2025-09-21","ids":{"openalex":"https://openalex.org/W4415378223","doi":"https://doi.org/10.1109/prime66228.2025.11203705"},"language":null,"primary_location":{"id":"doi:10.1109/prime66228.2025.11203705","is_oa":false,"landing_page_url":"https://doi.org/10.1109/prime66228.2025.11203705","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5120076839","display_name":"Felice Simone Coniglio","orcid":null},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"education","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Felice Simone Coniglio","raw_affiliation_strings":["University of Catania,Department of Electrical, Electronic and Computer Science Engineering (DIEEI)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Catania,Department of Electrical, Electronic and Computer Science Engineering (DIEEI)","institution_ids":["https://openalex.org/I39063666"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034998942","display_name":"Marco Privitera","orcid":"https://orcid.org/0000-0002-7492-6653"},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"education","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Marco Privitera","raw_affiliation_strings":["University of Catania,Department of Electrical, Electronic and Computer Science Engineering (DIEEI)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Catania,Department of Electrical, Electronic and Computer Science Engineering (DIEEI)","institution_ids":["https://openalex.org/I39063666"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078615947","display_name":"Alfio Dario Grasso","orcid":"https://orcid.org/0000-0002-5707-9683"},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"education","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alfio Dario Grasso","raw_affiliation_strings":["University of Catania,Department of Electrical, Electronic and Computer Science Engineering (DIEEI)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Catania,Department of Electrical, Electronic and Computer Science Engineering (DIEEI)","institution_ids":["https://openalex.org/I39063666"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I39063666"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.60796646,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11472","display_name":"Analytical Chemistry and Sensors","score":0.9398999810218811,"subfield":{"id":"https://openalex.org/subfields/1502","display_name":"Bioengineering"},"field":{"id":"https://openalex.org/fields/15","display_name":"Chemical Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11472","display_name":"Analytical Chemistry and Sensors","score":0.9398999810218811,"subfield":{"id":"https://openalex.org/subfields/1502","display_name":"Bioengineering"},"field":{"id":"https://openalex.org/fields/15","display_name":"Chemical Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6796000003814697},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5641000270843506},{"id":"https://openalex.org/keywords/operational-transconductance-amplifier","display_name":"Operational transconductance amplifier","score":0.48350000381469727},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.4810999929904938},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.4025999903678894},{"id":"https://openalex.org/keywords/transconductance","display_name":"Transconductance","score":0.3732999861240387},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.36390000581741333},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.35740000009536743}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6796000003814697},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.650600016117096},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5641000270843506},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.48910000920295715},{"id":"https://openalex.org/C58117264","wikidata":"https://www.wikidata.org/wiki/Q1239595","display_name":"Operational transconductance amplifier","level":5,"score":0.48350000381469727},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.4810999929904938},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.4481000006198883},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.4025999903678894},{"id":"https://openalex.org/C2779283907","wikidata":"https://www.wikidata.org/wiki/Q1632964","display_name":"Transconductance","level":4,"score":0.3732999861240387},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.36390000581741333},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.35740000009536743},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.35190001130104065},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.33379998803138733},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3174000084400177},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.310699999332428},{"id":"https://openalex.org/C379707","wikidata":"https://www.wikidata.org/wiki/Q2328303","display_name":"Analog signal processing","level":4,"score":0.30309998989105225},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.289000004529953},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.2808000147342682},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.2784000039100647},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.272599995136261},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.27219998836517334},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2718999981880188},{"id":"https://openalex.org/C98142538","wikidata":"https://www.wikidata.org/wiki/Q485005","display_name":"Analog multiplier","level":4,"score":0.2703000009059906},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.2524999976158142}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/prime66228.2025.11203705","is_oa":false,"landing_page_url":"https://doi.org/10.1109/prime66228.2025.11203705","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W2054056691","https://openalex.org/W2580425382","https://openalex.org/W3120609227","https://openalex.org/W3154437343","https://openalex.org/W3167303334","https://openalex.org/W3177178868","https://openalex.org/W4226350772","https://openalex.org/W4229065898","https://openalex.org/W4295956913","https://openalex.org/W4379620534","https://openalex.org/W4391248725"],"related_works":[],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,27,41],"novel":[4],"$0.4-\\mathrm{V}$":[5],"current-biased":[6],"inverter-based":[7,43],"two-stage":[8,42],"fully-synthesizable":[9],"operational":[10],"transconductance":[11],"amplifier":[12],"(OTA),":[13],"targeting":[14],"ultra-low-power":[15],"analog":[16,124],"signal":[17],"processing":[18],"in":[19,74],"standard-cell":[20],"design":[21,34],"environments.":[22],"For":[23],"the":[24,50,79,110,113,121],"first":[25],"time,":[26],"synthesizable":[28],"current-biasing":[29],"technique":[30],"compatible":[31],"with":[32],"digital":[33,127],"flows":[35],"is":[36],"introduced":[37],"and":[38,59,72,84,104,126],"integrated":[39],"into":[40],"OTA":[44,80],"topology.":[45],"The":[46],"proposed":[47,114],"architecture":[48],"eliminates":[49],"need":[51],"for":[52,96],"custom":[53],"bias":[54],"circuitry,":[55],"enabling":[56],"fully-automated":[57],"implementation":[58],"scalability":[60],"across":[61],"CMOS":[62,77],"technology":[63],"nodes.":[64],"Operating":[65],"at":[66],"$\\mathbf{0.":[67],"4":[68],"-":[69],"V}$":[70],"supply":[71],"implemented":[73],"standard":[75],"$180-\\mathrm{nm}$":[76],"technology,":[78],"achieves":[81],"competitive":[82],"gain":[83],"bandwidth":[85],"metrics":[86],"while":[87],"maintaining":[88],"nanowatt":[89],"power":[90],"consumption,":[91],"making":[92],"it":[93],"well":[94],"suited":[95],"energy-constrained":[97],"applications":[98],"such":[99],"as":[100],"IoT":[101],"edge":[102],"nodes":[103],"biomedical":[105],"interfaces.":[106],"Simulation":[107],"results":[108],"validate":[109],"effectiveness":[111],"of":[112],"design,":[115],"demonstrating":[116],"its":[117],"capability":[118],"to":[119],"bridge":[120],"gap":[122],"between":[123],"functionality":[125],"synthesizability.":[128]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-21T00:00:00"}