{"id":"https://openalex.org/W4415378193","doi":"https://doi.org/10.1109/prime66228.2025.11203677","title":"A DLL-Based FSK Demodulator for Asynchronous Communications","display_name":"A DLL-Based FSK Demodulator for Asynchronous Communications","publication_year":2025,"publication_date":"2025-09-21","ids":{"openalex":"https://openalex.org/W4415378193","doi":"https://doi.org/10.1109/prime66228.2025.11203677"},"language":"en","primary_location":{"id":"doi:10.1109/prime66228.2025.11203677","is_oa":false,"landing_page_url":"https://doi.org/10.1109/prime66228.2025.11203677","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5119061871","display_name":"Lucrezia Navarin","orcid":"https://orcid.org/0009-0009-5073-6423"},"institutions":[{"id":"https://openalex.org/I138689650","display_name":"University of Padua","ror":"https://ror.org/00240q980","country_code":"IT","type":"education","lineage":["https://openalex.org/I138689650"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Lucrezia Navarin","raw_affiliation_strings":["DEI, University of Padova,Padova,Italy"],"affiliations":[{"raw_affiliation_string":"DEI, University of Padova,Padova,Italy","institution_ids":["https://openalex.org/I138689650"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084402240","display_name":"A. Neviani","orcid":"https://orcid.org/0000-0002-7839-9192"},"institutions":[{"id":"https://openalex.org/I138689650","display_name":"University of Padua","ror":"https://ror.org/00240q980","country_code":"IT","type":"education","lineage":["https://openalex.org/I138689650"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Andrea Neviani","raw_affiliation_strings":["DEI, University of Padova,Padova,Italy"],"affiliations":[{"raw_affiliation_string":"DEI, University of Padova,Padova,Italy","institution_ids":["https://openalex.org/I138689650"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035099638","display_name":"Andrea Bevilacqua","orcid":"https://orcid.org/0000-0002-5664-9197"},"institutions":[{"id":"https://openalex.org/I138689650","display_name":"University of Padua","ror":"https://ror.org/00240q980","country_code":"IT","type":"education","lineage":["https://openalex.org/I138689650"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Andrea Bevilacqua","raw_affiliation_strings":["DEI, University of Padova,Padova,Italy"],"affiliations":[{"raw_affiliation_string":"DEI, University of Padova,Padova,Italy","institution_ids":["https://openalex.org/I138689650"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5119061871"],"corresponding_institution_ids":["https://openalex.org/I138689650"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.37549254,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9829999804496765,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9829999804496765,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.980400025844574,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12146","display_name":"Power Line Communications and Noise","score":0.9745000004768372,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/demodulation","display_name":"Demodulation","score":0.9495000243186951},{"id":"https://openalex.org/keywords/frequency-shift-keying","display_name":"Frequency-shift keying","score":0.9387000203132629},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.6449000239372253},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.5698999762535095},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4415000081062317},{"id":"https://openalex.org/keywords/frequency-modulation","display_name":"Frequency modulation","score":0.38760000467300415},{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.36340001225471497},{"id":"https://openalex.org/keywords/limit","display_name":"Limit (mathematics)","score":0.35910001397132874}],"concepts":[{"id":"https://openalex.org/C195251586","wikidata":"https://www.wikidata.org/wiki/Q1185939","display_name":"Demodulation","level":3,"score":0.9495000243186951},{"id":"https://openalex.org/C163996819","wikidata":"https://www.wikidata.org/wiki/Q1166054","display_name":"Frequency-shift keying","level":4,"score":0.9387000203132629},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.6449000239372253},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6299999952316284},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.5698999762535095},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5271999835968018},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4415000081062317},{"id":"https://openalex.org/C11930861","wikidata":"https://www.wikidata.org/wiki/Q181417","display_name":"Frequency modulation","level":3,"score":0.38760000467300415},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.38119998574256897},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.36340001225471497},{"id":"https://openalex.org/C151201525","wikidata":"https://www.wikidata.org/wiki/Q177239","display_name":"Limit (mathematics)","level":2,"score":0.35910001397132874},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.3531000018119812},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.32600000500679016},{"id":"https://openalex.org/C186886427","wikidata":"https://www.wikidata.org/wiki/Q5441213","display_name":"Feedback loop","level":2,"score":0.3156999945640564},{"id":"https://openalex.org/C66727535","wikidata":"https://www.wikidata.org/wiki/Q7662199","display_name":"Synchronizer","level":2,"score":0.29409998655319214},{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.28870001435279846},{"id":"https://openalex.org/C101765175","wikidata":"https://www.wikidata.org/wiki/Q577764","display_name":"Communications system","level":2,"score":0.28850001096725464},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.2639000117778778},{"id":"https://openalex.org/C25915539","wikidata":"https://www.wikidata.org/wiki/Q220786","display_name":"Automatic frequency control","level":2,"score":0.26109999418258667},{"id":"https://openalex.org/C123079801","wikidata":"https://www.wikidata.org/wiki/Q750240","display_name":"Modulation (music)","level":2,"score":0.2524000108242035},{"id":"https://openalex.org/C123919525","wikidata":"https://www.wikidata.org/wiki/Q761942","display_name":"Frequency deviation","level":3,"score":0.2517000138759613}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/prime66228.2025.11203677","is_oa":false,"landing_page_url":"https://doi.org/10.1109/prime66228.2025.11203677","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME)","raw_type":"proceedings-article"},{"id":"pmh:oai:www.research.unipd.it:11577/3565319","is_oa":false,"landing_page_url":"https://hdl.handle.net/11577/3565319","pdf_url":null,"source":{"id":"https://openalex.org/S4377196283","display_name":"Research Padua  Archive (University of Padua)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I138689650","host_organization_name":"University of Padua","host_organization_lineage":["https://openalex.org/I138689650"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1546952310","https://openalex.org/W1978193536","https://openalex.org/W1986127677","https://openalex.org/W2020389364","https://openalex.org/W2059008798","https://openalex.org/W2083246018","https://openalex.org/W2083906499","https://openalex.org/W2086336002","https://openalex.org/W2139846007","https://openalex.org/W2146399755","https://openalex.org/W2146883153","https://openalex.org/W2159179140","https://openalex.org/W2552458212","https://openalex.org/W4255293596"],"related_works":[],"abstract_inverted_index":{"This":[0],"paper":[1],"discusses":[2],"the":[3,29,45,50,54,59,61,72,90,99],"use":[4],"of":[5,21,24,53,92,98,108],"a":[6,25,35,93,117],"delay-locked":[7],"loop":[8,42],"(DLL)":[9],"to":[10,39,71,78],"perform":[11],"frequency":[12,36,51],"shift-keying":[13],"(FSK)":[14],"demodulation":[15,76],"in":[16,89,116],"asynchronous":[17],"communication":[18],"systems.":[19],"Instead":[20],"being":[22],"part":[23],"more":[26],"complex":[27],"architecture,":[28],"DLL":[30,66,100],"is":[31,104],"here":[32],"used":[33],"as":[34,101],"demodulator.":[37],"Similarly":[38],"its":[40,79],"phase-locked":[41],"(PLL)":[43],"counterpart,":[44],"DLL-based":[46],"FSK":[47,75,102],"demodulator":[48,103],"tracks":[49],"variations":[52],"input":[55],"signal,":[56],"providing":[57],"at":[58],"output":[60],"demodulated":[62],"received":[63],"data.":[64],"The":[65,96],"constitutes":[67],"an":[68],"efficient":[69],"alternative":[70],"PLL":[73],"for":[74],"due":[77],"lower":[80],"complexity,":[81],"moderate":[82],"power":[83],"consumption,":[84],"and":[85,111],"reliable":[86],"performance":[87],"even":[88],"absence":[91],"reference":[94],"clock.":[95],"viability":[97],"verified":[105],"by":[106],"means":[107],"both":[109],"behavioral":[110],"transistor-level":[112],"simulations":[113],"carried":[114],"out":[115],"$0.13":[118],"\\mu":[119],"\\mathrm{~m}$":[120],"CMOS":[121],"technology.":[122]},"counts_by_year":[],"updated_date":"2026-03-07T16:01:11.037858","created_date":"2025-10-21T00:00:00"}