{"id":"https://openalex.org/W4415378129","doi":"https://doi.org/10.1109/prime66228.2025.11203554","title":"A Novel Ultra-Low-Voltage Pseudo-Dynamic Voltage Comparator Based On OAI Standard-Cells","display_name":"A Novel Ultra-Low-Voltage Pseudo-Dynamic Voltage Comparator Based On OAI Standard-Cells","publication_year":2025,"publication_date":"2025-09-21","ids":{"openalex":"https://openalex.org/W4415378129","doi":"https://doi.org/10.1109/prime66228.2025.11203554"},"language":"en","primary_location":{"id":"doi:10.1109/prime66228.2025.11203554","is_oa":false,"landing_page_url":"https://doi.org/10.1109/prime66228.2025.11203554","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5116574818","display_name":"Antonio Manno","orcid":"https://orcid.org/0009-0001-5584-4425"},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"education","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Antonio Manno","raw_affiliation_strings":["University of Catania,DIEEI,Catania,Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Catania,DIEEI,Catania,Italy","institution_ids":["https://openalex.org/I39063666"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010336494","display_name":"Giuseppe Scotti","orcid":"https://orcid.org/0000-0002-5650-8212"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Giuseppe Scotti","raw_affiliation_strings":["University of Rome &#x201C;La Sapienza&#x201D;,DIET,Rome,Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Rome &#x201C;La Sapienza&#x201D;,DIET,Rome,Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044422028","display_name":"G. Palumbo","orcid":"https://orcid.org/0000-0002-8011-8660"},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"education","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Gaetano Palumbo","raw_affiliation_strings":["University of Catania,DIEEI,Catania,Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Catania,DIEEI,Catania,Italy","institution_ids":["https://openalex.org/I39063666"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12564","display_name":"Sensor Technology and Measurement Systems","score":0.9667999744415283,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12564","display_name":"Sensor Technology and Measurement Systems","score":0.9667999744415283,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.9557999968528748,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12300","display_name":"Advanced Electrical Measurement Techniques","score":0.9222999811172485,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.9050999879837036},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6413000226020813},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.6229000091552734},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.603600025177002},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.40119999647140503},{"id":"https://openalex.org/keywords/common-mode-signal","display_name":"Common-mode signal","score":0.3874000012874603},{"id":"https://openalex.org/keywords/range","display_name":"Range (aeronautics)","score":0.3749000132083893},{"id":"https://openalex.org/keywords/voltage-reference","display_name":"Voltage reference","score":0.36239999532699585}],"concepts":[{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.9050999879837036},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6413000226020813},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.6229000091552734},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.603600025177002},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5684000253677368},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5641999840736389},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.45019999146461487},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.40119999647140503},{"id":"https://openalex.org/C189714311","wikidata":"https://www.wikidata.org/wiki/Q1530371","display_name":"Common-mode signal","level":4,"score":0.3874000012874603},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.3749000132083893},{"id":"https://openalex.org/C44351266","wikidata":"https://www.wikidata.org/wiki/Q1465532","display_name":"Voltage reference","level":3,"score":0.36239999532699585},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.351500004529953},{"id":"https://openalex.org/C121649978","wikidata":"https://www.wikidata.org/wiki/Q17007408","display_name":"Comparator applications","level":4,"score":0.33719998598098755},{"id":"https://openalex.org/C2780009758","wikidata":"https://www.wikidata.org/wiki/Q6804172","display_name":"Measure (data warehouse)","level":2,"score":0.3059999942779541},{"id":"https://openalex.org/C128624480","wikidata":"https://www.wikidata.org/wiki/Q1504817","display_name":"Low voltage","level":3,"score":0.30219998955726624},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.29429998993873596},{"id":"https://openalex.org/C87133666","wikidata":"https://www.wikidata.org/wiki/Q1161699","display_name":"Dynamic range","level":2,"score":0.28850001096725464},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2881999909877777},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2842999994754791},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.2793999910354614},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2581999897956848}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/prime66228.2025.11203554","is_oa":false,"landing_page_url":"https://doi.org/10.1109/prime66228.2025.11203554","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME)","raw_type":"proceedings-article"},{"id":"pmh:oai:iris.uniroma1.it:11573/1763052","is_oa":false,"landing_page_url":"https://hdl.handle.net/11573/1763052","pdf_url":null,"source":{"id":"https://openalex.org/S4377196107","display_name":"IRIS Research product catalog (Sapienza University of Rome)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1976818170","https://openalex.org/W1983740965","https://openalex.org/W2011344406","https://openalex.org/W2097579177","https://openalex.org/W2105430742","https://openalex.org/W2131792101","https://openalex.org/W2140823559","https://openalex.org/W2170280734","https://openalex.org/W2800836468","https://openalex.org/W2918664767","https://openalex.org/W3013689876","https://openalex.org/W3039999009","https://openalex.org/W3088896720","https://openalex.org/W4223976365","https://openalex.org/W4225886576","https://openalex.org/W4291653022","https://openalex.org/W4385977946","https://openalex.org/W4390494399","https://openalex.org/W4408295965"],"related_works":[],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"a":[3,67],"novel":[4],"Pseudo-Dynamic":[5],"Voltage":[6,41],"Comparator":[7],"(PDVC),":[8],"based":[9],"on":[10],"OAI":[11,25],"(Or-And-Invert)":[12],"standard-cells,":[13],"with":[14,34,107,118],"Non-Rail-to-Rail":[15,113],"input":[16,87],"common-mode":[17],"range":[18],"(ICMR)":[19],"is":[20,50,63],"presented.":[21],"The":[22,57,91],"topology":[23],"exploits":[24],"gates":[26],"to":[27,36,66,109,124],"reduce":[28],"the":[29,37,61,85,94,98,110],"clock-to-output":[30],"delay":[31],"and":[32,81,105],"Power-Delay-Product":[33],"respect":[35,108],"other":[38,111],"conventional":[39,112],"Dynamic":[40],"Comparators":[42],"(DVCs)":[43],"in":[44,52,101,115],"literature,":[45,116],"and,":[46],"its":[47],"operating":[48],"principle":[49],"described":[51],"detail":[53],"at":[54],"transistor":[55],"level.":[56],"overall":[58],"performance":[59],"of":[60,97,103],"circuit":[62],"assessed,":[64],"referring":[65],"45":[68],"nm":[69],"CMOS":[70],"technology,":[71],"considering":[72],"three":[73],"different":[74],"supply":[75,121],"voltages:":[76],"$0.6":[77],"\\mathrm{~V},":[78],"0.3":[79],"\\mathrm{~V}$":[80],"0.15":[82,125],"V,":[83],"along":[84],"entire":[86],"common":[88],"mode":[89],"range.":[90],"results":[92],"demonstrate":[93],"strong":[95],"advantages":[96],"proposed":[99],"PDVC,":[100],"terms":[102],"speed":[104],"Power-Delay-Product,":[106],"DVCs":[114],"especially":[117],"hardly":[119],"scaled":[120],"voltages":[122],"down":[123],"V.":[126]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-21T00:00:00"}
