{"id":"https://openalex.org/W4415398277","doi":"https://doi.org/10.1109/prime66228.2025.11203325","title":"Automatic Generation of ACM Design-Oriented Models for MOS Transistors from Quasi-Static Wafer-Level Characterization Data","display_name":"Automatic Generation of ACM Design-Oriented Models for MOS Transistors from Quasi-Static Wafer-Level Characterization Data","publication_year":2025,"publication_date":"2025-09-21","ids":{"openalex":"https://openalex.org/W4415398277","doi":"https://doi.org/10.1109/prime66228.2025.11203325"},"language":"en","primary_location":{"id":"doi:10.1109/prime66228.2025.11203325","is_oa":false,"landing_page_url":"https://doi.org/10.1109/prime66228.2025.11203325","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://hal.science/hal-05353457/document","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5104617754","display_name":"Catalin Andrei Dobrin","orcid":null},"institutions":[{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"C. A. Dobrin","raw_affiliation_strings":["Univ. Grenoble Alpes,CNRS Grenoble INP TIMA,Grenoble,France,F-38000"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Univ. Grenoble Alpes,CNRS Grenoble INP TIMA,Grenoble,France,F-38000","institution_ids":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I899635006"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046885551","display_name":"David Gaidioz","orcid":"https://orcid.org/0000-0002-5192-7426"},"institutions":[{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"D. Gaidioz","raw_affiliation_strings":["STMicroelectronics,Crolles,France,38920"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelectronics,Crolles,France,38920","institution_ids":["https://openalex.org/I4210104693"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082431812","display_name":"Philippe Cathelin","orcid":"https://orcid.org/0000-0001-5603-3352"},"institutions":[{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"P. Cathelin","raw_affiliation_strings":["STMicroelectronics,Crolles,France,38920"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelectronics,Crolles,France,38920","institution_ids":["https://openalex.org/I4210104693"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110819980","display_name":"Florence Podevin","orcid":"https://orcid.org/0000-0002-8477-5617"},"institutions":[{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"F. Podevin","raw_affiliation_strings":["Univ. Grenoble Alpes,CNRS Grenoble INP TIMA,Grenoble,France,F-38000"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Univ. Grenoble Alpes,CNRS Grenoble INP TIMA,Grenoble,France,F-38000","institution_ids":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I899635006"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057267077","display_name":"Sylvain Bourdel","orcid":"https://orcid.org/0000-0001-9930-9945"},"institutions":[{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"S. Bourdel","raw_affiliation_strings":["Univ. Grenoble Alpes,CNRS Grenoble INP TIMA,Grenoble,France,F-38000"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Univ. Grenoble Alpes,CNRS Grenoble INP TIMA,Grenoble,France,F-38000","institution_ids":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I899635006"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085204712","display_name":"Manuel J. Barrag\u00e1n","orcid":"https://orcid.org/0000-0003-0187-604X"},"institutions":[{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"M. J. Barragan","raw_affiliation_strings":["Univ. Grenoble Alpes,CNRS Grenoble INP TIMA,Grenoble,France,F-38000"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Univ. Grenoble Alpes,CNRS Grenoble INP TIMA,Grenoble,France,F-38000","institution_ids":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I899635006"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.8676,"has_fulltext":true,"cited_by_count":1,"citation_normalized_percentile":{"value":0.89802953,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9945999979972839,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.7013999819755554},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.5979999899864197},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5918999910354614},{"id":"https://openalex.org/keywords/parametric-statistics","display_name":"Parametric statistics","score":0.5845999717712402},{"id":"https://openalex.org/keywords/parametric-model","display_name":"Parametric model","score":0.4521999955177307},{"id":"https://openalex.org/keywords/transistor-model","display_name":"Transistor model","score":0.428600013256073},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.36980000138282776},{"id":"https://openalex.org/keywords/variation","display_name":"Variation (astronomy)","score":0.3594000041484833}],"concepts":[{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.7013999819755554},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.5979999899864197},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5918999910354614},{"id":"https://openalex.org/C117251300","wikidata":"https://www.wikidata.org/wiki/Q1849855","display_name":"Parametric statistics","level":2,"score":0.5845999717712402},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.551800012588501},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5163999795913696},{"id":"https://openalex.org/C24574437","wikidata":"https://www.wikidata.org/wiki/Q7135228","display_name":"Parametric model","level":3,"score":0.4521999955177307},{"id":"https://openalex.org/C150169584","wikidata":"https://www.wikidata.org/wiki/Q7834319","display_name":"Transistor model","level":4,"score":0.428600013256073},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.36980000138282776},{"id":"https://openalex.org/C2778334786","wikidata":"https://www.wikidata.org/wiki/Q1586270","display_name":"Variation (astronomy)","level":2,"score":0.3594000041484833},{"id":"https://openalex.org/C2780841128","wikidata":"https://www.wikidata.org/wiki/Q5073781","display_name":"Characterization (materials science)","level":2,"score":0.35659998655319214},{"id":"https://openalex.org/C16910744","wikidata":"https://www.wikidata.org/wiki/Q7705759","display_name":"Test data","level":2,"score":0.3483000099658966},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.34610000252723694},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.34060001373291016},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.31299999356269836},{"id":"https://openalex.org/C2777466982","wikidata":"https://www.wikidata.org/wiki/Q5227287","display_name":"Data extraction","level":3,"score":0.3070000112056732},{"id":"https://openalex.org/C67186912","wikidata":"https://www.wikidata.org/wiki/Q367664","display_name":"Data modeling","level":2,"score":0.2962999939918518},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2856000065803528},{"id":"https://openalex.org/C2778348673","wikidata":"https://www.wikidata.org/wiki/Q739302","display_name":"Production (economics)","level":2,"score":0.2667999863624573},{"id":"https://openalex.org/C4775677","wikidata":"https://www.wikidata.org/wiki/Q7449393","display_name":"Semiconductor device modeling","level":3,"score":0.2535000145435333},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.2526000142097473}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/prime66228.2025.11203325","is_oa":false,"landing_page_url":"https://doi.org/10.1109/prime66228.2025.11203325","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME)","raw_type":"proceedings-article"},{"id":"pmh:oai:HAL:hal-05353457v1","is_oa":true,"landing_page_url":"https://hal.science/hal-05353457","pdf_url":"https://hal.science/hal-05353457/document","source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME), Sep 2025, Taormina, Italy. pp.1 - 4, ⟨10.1109/prime66228.2025.11203325⟩","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"pmh:oai:HAL:hal-05353457v1","is_oa":true,"landing_page_url":"https://hal.science/hal-05353457","pdf_url":"https://hal.science/hal-05353457/document","source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME), Sep 2025, Taormina, Italy. pp.1 - 4, ⟨10.1109/prime66228.2025.11203325⟩","raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4415398277.pdf","grobid_xml":"https://content.openalex.org/works/W4415398277.grobid-xml"},"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"This":[0,20],"paper":[1],"introduces":[2],"a":[3,36,68],"novel":[4],"MOS":[5],"Transistor":[6],"model":[7],"extraction":[8],"methodology":[9],"from":[10],"wafer-related":[11],"parametric":[12],"test":[13],"data":[14],"to":[15,64],"characterize":[16],"process":[17,42],"variation":[18,53],"effects.":[19],"approach":[21],"provides":[22],"critical":[23],"insights":[24],"into":[25],"the":[26,56,59],"impact":[27],"of":[28,61],"variability":[29],"on":[30],"devices":[31],"after":[32],"production":[33,80],"and":[34,39,48],"supports":[35],"more":[37],"efficient":[38],"comprehensive":[40],"design":[41],"by":[43],"enabling":[44,76],"circuit":[45],"post-fabrication":[46,73],"simulation":[47,74],"calibration.":[49],"By":[50],"identifying":[51],"performance":[52,65],"causes":[54],"at":[55],"transistor":[57],"level,":[58],"application":[60],"this":[62],"method":[63],"prediction":[66],"represents":[67],"major":[69],"advancement":[70],"over":[71],"existing":[72],"approaches,":[75],"potential":[77],"improvements":[78],"in":[79],"yield.":[81]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-08-18T07:49:30.821534","created_date":"2025-10-22T00:00:00"}