{"id":"https://openalex.org/W4285012263","doi":"https://doi.org/10.1109/prime55000.2022.9816774","title":"How to design an input stage for neural recording system in 22 nm FDSOI","display_name":"How to design an input stage for neural recording system in 22 nm FDSOI","publication_year":2022,"publication_date":"2022-06-12","ids":{"openalex":"https://openalex.org/W4285012263","doi":"https://doi.org/10.1109/prime55000.2022.9816774"},"language":"en","primary_location":{"id":"doi:10.1109/prime55000.2022.9816774","is_oa":false,"landing_page_url":"https://doi.org/10.1109/prime55000.2022.9816774","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017310448","display_name":"Franz Marcus Sch\u00fcffny","orcid":"https://orcid.org/0000-0001-7849-5849"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Franz Marcus Schuffny","raw_affiliation_strings":["TU Dresden,Faculty of Electrical and Computer Engineering","Faculty of Electrical and Computer Engineering, TU Dresden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TU Dresden,Faculty of Electrical and Computer Engineering","institution_ids":["https://openalex.org/I78650965"]},{"raw_affiliation_string":"Faculty of Electrical and Computer Engineering, TU Dresden","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050298468","display_name":"Sebastian H\u00f6ppner","orcid":"https://orcid.org/0000-0002-9938-2736"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Sebastian Hoppner","raw_affiliation_strings":["TU Dresden,Faculty of Electrical and Computer Engineering","Faculty of Electrical and Computer Engineering, TU Dresden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TU Dresden,Faculty of Electrical and Computer Engineering","institution_ids":["https://openalex.org/I78650965"]},{"raw_affiliation_string":"Faculty of Electrical and Computer Engineering, TU Dresden","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003764784","display_name":"Seyed Mohammad Ali Zeinolabedin","orcid":"https://orcid.org/0000-0002-9156-3751"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Seyed Mohammad Ali Zeinolabedin","raw_affiliation_strings":["TU Dresden,Faculty of Electrical and Computer Engineering","Faculty of Electrical and Computer Engineering, TU Dresden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TU Dresden,Faculty of Electrical and Computer Engineering","institution_ids":["https://openalex.org/I78650965"]},{"raw_affiliation_string":"Faculty of Electrical and Computer Engineering, TU Dresden","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060378870","display_name":"Richard George","orcid":"https://orcid.org/0000-0003-1616-8601"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Richard Miru George","raw_affiliation_strings":["TU Dresden,Faculty of Electrical and Computer Engineering","Faculty of Electrical and Computer Engineering, TU Dresden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TU Dresden,Faculty of Electrical and Computer Engineering","institution_ids":["https://openalex.org/I78650965"]},{"raw_affiliation_string":"Faculty of Electrical and Computer Engineering, TU Dresden","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071241846","display_name":"Christian Mayr","orcid":"https://orcid.org/0000-0003-3502-0872"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Christian Mayr","raw_affiliation_strings":["TU Dresden,Faculty of Electrical and Computer Engineering","Faculty of Electrical and Computer Engineering, TU Dresden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TU Dresden,Faculty of Electrical and Computer Engineering","institution_ids":["https://openalex.org/I78650965"]},{"raw_affiliation_string":"Faculty of Electrical and Computer Engineering, TU Dresden","institution_ids":["https://openalex.org/I78650965"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I78650965"],"apc_list":null,"apc_paid":null,"fwci":0.9783,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.71239866,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"297","last_page":"300"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.8999000191688538,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.8999000191688538,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.8385000228881836,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.8363999724388123,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5936754941940308},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.33702921867370605},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2204858660697937}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5936754941940308},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.33702921867370605},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2204858660697937}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/prime55000.2022.9816774","is_oa":false,"landing_page_url":"https://doi.org/10.1109/prime55000.2022.9816774","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W4391913857","https://openalex.org/W2358668433","https://openalex.org/W4396701345","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W4396696052"],"abstract_inverted_index":{"The":[0],"increase":[1],"of":[2,15,54,68,104,133,139,143],"recording":[3,9],"channels":[4],"in":[5,29,39,83,118,122,163],"modern":[6],"electrode-based":[7],"neural":[8],"systems":[10],"is":[11,97],"limited":[12],"by":[13],"considerations":[14],"power.":[16],"Emerging":[17],"CMOS":[18],"technologies":[19],"like":[20],"22":[21],"nm":[22],"FDSOI":[23],"promise":[24],"to":[25,34,60,79,101],"open":[26],"new":[27],"perspectives":[28],"overcoming":[30],"power":[31,80],"constraints":[32],"due":[33],"their":[35],"particular":[36],"energy":[37],"efficiency":[38],"digital":[40],"circuit":[41],"integration,":[42],"they":[43],"however":[44],"also":[45],"pose":[46],"a":[47,89,112,157],"challenge":[48],"for":[49,111,136,156],"the":[50,66,73,102,105,140,144,147,151],"analogue":[51],"front-end":[52],"stages":[53],"such":[55],"systems,":[56],"especially":[57],"with":[58,77],"respect":[59,78],"signal":[61],"noise.":[62,123],"This":[63],"paper":[64],"addresses":[65],"design":[67,103,149],"low":[69],"noise":[70,93,96,110,154],"amplifiers":[71],"(LNA),":[72],"most":[74],"critical":[75],"component":[76],"and":[81,86,94,120,127,131,160],"noise,":[82],"this":[84,164],"technology":[85],"application.":[87],"Moreover,":[88],"trade-off":[90],"between":[91],"igs-shot":[92],"flicker":[95],"described,":[98],"which":[99],"leads":[100],"LNA\u2019s":[106],"operational":[107],"amplifier,":[108],"minimising":[109],"given":[113,158],"current.":[114],"Capacitor":[115],"types":[116,130],"vary":[117],"leakage":[119],"hence":[121],"We":[124],"therefore":[125],"simulated":[126],"analysed":[128],"different":[129],"sizes":[132],"DC-decoupling":[134],"capacitors":[135],"an":[137],"estimation":[138],"minimum-area":[141],"requirement":[142],"LNA.":[145],"Notably,":[146],"described":[148],"approaches":[150],"minimum":[152],"input-referred":[153],"possible":[155],"current":[159],"input":[161],"capacitor":[162],"technology.":[165]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
