{"id":"https://openalex.org/W4285036973","doi":"https://doi.org/10.1109/prime55000.2022.9816756","title":"A Triode-Compensated CMOS Bandgap Core for Sub-250 mV Supply Voltages","display_name":"A Triode-Compensated CMOS Bandgap Core for Sub-250 mV Supply Voltages","publication_year":2022,"publication_date":"2022-06-12","ids":{"openalex":"https://openalex.org/W4285036973","doi":"https://doi.org/10.1109/prime55000.2022.9816756"},"language":"en","primary_location":{"id":"doi:10.1109/prime55000.2022.9816756","is_oa":false,"landing_page_url":"https://doi.org/10.1109/prime55000.2022.9816756","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5073063211","display_name":"Francesco Gagliardi","orcid":"https://orcid.org/0000-0002-0790-5078"},"institutions":[{"id":"https://openalex.org/I108290504","display_name":"University of Pisa","ror":"https://ror.org/03ad39j10","country_code":"IT","type":"education","lineage":["https://openalex.org/I108290504"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"F. Gagliardi","raw_affiliation_strings":["University of Pisa,Department of information engineering,Italy","Department of information engineering, University of Pisa, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Pisa,Department of information engineering,Italy","institution_ids":["https://openalex.org/I108290504"]},{"raw_affiliation_string":"Department of information engineering, University of Pisa, Italy","institution_ids":["https://openalex.org/I108290504"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020626961","display_name":"Andrea Ria","orcid":"https://orcid.org/0000-0002-2120-9618"},"institutions":[{"id":"https://openalex.org/I4210100607","display_name":"Institute of Electronics, Computer and Telecommunication Engineering","ror":"https://ror.org/00n4jbh84","country_code":"IT","type":"facility","lineage":["https://openalex.org/I4210100607","https://openalex.org/I4210155236"]},{"id":"https://openalex.org/I4210155236","display_name":"National Research Council","ror":"https://ror.org/04zaypm56","country_code":"IT","type":"nonprofit","lineage":["https://openalex.org/I4210155236"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"A. Ria","raw_affiliation_strings":["IEIIT-National Research Council (CNR),Pisa,Italy","IEIIT-National Research Council (CNR), Pisa, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IEIIT-National Research Council (CNR),Pisa,Italy","institution_ids":["https://openalex.org/I4210155236","https://openalex.org/I4210100607"]},{"raw_affiliation_string":"IEIIT-National Research Council (CNR), Pisa, Italy","institution_ids":["https://openalex.org/I4210155236","https://openalex.org/I4210100607"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021285908","display_name":"Giuseppe Manfredini","orcid":"https://orcid.org/0000-0003-0369-9809"},"institutions":[{"id":"https://openalex.org/I108290504","display_name":"University of Pisa","ror":"https://ror.org/03ad39j10","country_code":"IT","type":"education","lineage":["https://openalex.org/I108290504"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"G. Manfredini","raw_affiliation_strings":["University of Pisa,Department of information engineering,Italy","Department of information engineering, University of Pisa, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Pisa,Department of information engineering,Italy","institution_ids":["https://openalex.org/I108290504"]},{"raw_affiliation_string":"Department of information engineering, University of Pisa, Italy","institution_ids":["https://openalex.org/I108290504"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080172474","display_name":"Massimo Piotto","orcid":"https://orcid.org/0000-0002-0197-3686"},"institutions":[{"id":"https://openalex.org/I108290504","display_name":"University of Pisa","ror":"https://ror.org/03ad39j10","country_code":"IT","type":"education","lineage":["https://openalex.org/I108290504"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M. Piotto","raw_affiliation_strings":["University of Pisa,Department of information engineering,Italy","Department of information engineering, University of Pisa, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Pisa,Department of information engineering,Italy","institution_ids":["https://openalex.org/I108290504"]},{"raw_affiliation_string":"Department of information engineering, University of Pisa, Italy","institution_ids":["https://openalex.org/I108290504"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048786468","display_name":"Paolo Bruschi","orcid":"https://orcid.org/0000-0003-2073-1073"},"institutions":[{"id":"https://openalex.org/I108290504","display_name":"University of Pisa","ror":"https://ror.org/03ad39j10","country_code":"IT","type":"education","lineage":["https://openalex.org/I108290504"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"P. Bruschi","raw_affiliation_strings":["University of Pisa,Department of information engineering,Italy","Department of information engineering, University of Pisa, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Pisa,Department of information engineering,Italy","institution_ids":["https://openalex.org/I108290504"]},{"raw_affiliation_string":"Department of information engineering, University of Pisa, Italy","institution_ids":["https://openalex.org/I108290504"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4086,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.54028819,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"85","last_page":"88"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12564","display_name":"Sensor Technology and Measurement Systems","score":0.9916999936103821,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/bandgap-voltage-reference","display_name":"Bandgap voltage reference","score":0.9047899842262268},{"id":"https://openalex.org/keywords/triode","display_name":"Triode","score":0.840782880783081},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7699952125549316},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.6666504144668579},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5516287088394165},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.5347024202346802},{"id":"https://openalex.org/keywords/voltage-reference","display_name":"Voltage reference","score":0.5331873893737793},{"id":"https://openalex.org/keywords/line-regulation","display_name":"Line regulation","score":0.49459215998649597},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.42773470282554626},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2605307102203369},{"id":"https://openalex.org/keywords/dropout-voltage","display_name":"Dropout voltage","score":0.24849286675453186},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.24105030298233032}],"concepts":[{"id":"https://openalex.org/C127033052","wikidata":"https://www.wikidata.org/wiki/Q48635","display_name":"Bandgap voltage reference","level":5,"score":0.9047899842262268},{"id":"https://openalex.org/C123544296","wikidata":"https://www.wikidata.org/wiki/Q176129","display_name":"Triode","level":4,"score":0.840782880783081},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7699952125549316},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.6666504144668579},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5516287088394165},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.5347024202346802},{"id":"https://openalex.org/C44351266","wikidata":"https://www.wikidata.org/wiki/Q1465532","display_name":"Voltage reference","level":3,"score":0.5331873893737793},{"id":"https://openalex.org/C2777901765","wikidata":"https://www.wikidata.org/wiki/Q6553328","display_name":"Line regulation","level":5,"score":0.49459215998649597},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.42773470282554626},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2605307102203369},{"id":"https://openalex.org/C15032970","wikidata":"https://www.wikidata.org/wiki/Q851210","display_name":"Dropout voltage","level":4,"score":0.24849286675453186},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.24105030298233032}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/prime55000.2022.9816756","is_oa":false,"landing_page_url":"https://doi.org/10.1109/prime55000.2022.9816756","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","raw_type":"proceedings-article"},{"id":"pmh:oai:arpi.unipi.it:11568/1150940","is_oa":false,"landing_page_url":"http://hdl.handle.net/11568/1150940","pdf_url":null,"source":{"id":"https://openalex.org/S4377196265","display_name":"CINECA IRIS Institutial research information system (University of Pisa)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I108290504","host_organization_name":"University of Pisa","host_organization_lineage":["https://openalex.org/I108290504"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8299999833106995}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W35920351","https://openalex.org/W11147392","https://openalex.org/W28204813","https://openalex.org/W24132298","https://openalex.org/W30248457","https://openalex.org/W29238288","https://openalex.org/W38142529","https://openalex.org/W43676553","https://openalex.org/W43495742","https://openalex.org/W25171553"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,34,38,54,63],"simple":[4],"and":[5,62],"original":[6],"CMOS,":[7],"sub-threshold":[8],"bandgap":[9],"voltage":[10,19,46,57],"reference":[11,45],"capable":[12],"of":[13,28,47,58],"operating":[14],"with":[15,37,53],"extremely":[16],"reduced":[17],"supply":[18,56],"values.":[20],"The":[21],"circuit":[22],"capability":[23],"is":[24],"demonstrated":[25],"by":[26],"means":[27],"accurate":[29],"electrical":[30],"simulations":[31],"performed":[32],"on":[33],"prototype":[35],"designed":[36],"standard":[39],"0.18":[40],"$\\mu$m":[41],"CMOS":[42],"process.":[43],"A":[44],"190":[48],"mV":[49,61],"has":[50],"been":[51],"obtained":[52],"minimum":[55],"only":[59],"223":[60],"line":[64],"regulation":[65],"close":[66],"to":[67],"8":[68],"mV/V.":[69]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2023,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2022-07-12T00:00:00"}