{"id":"https://openalex.org/W2980249900","doi":"https://doi.org/10.1109/patmos.2019.8862170","title":"RISC-V Extensions for Bit Manipulation Instructions","display_name":"RISC-V Extensions for Bit Manipulation Instructions","publication_year":2019,"publication_date":"2019-07-01","ids":{"openalex":"https://openalex.org/W2980249900","doi":"https://doi.org/10.1109/patmos.2019.8862170","mag":"2980249900"},"language":"en","primary_location":{"id":"doi:10.1109/patmos.2019.8862170","is_oa":false,"landing_page_url":"https://doi.org/10.1109/patmos.2019.8862170","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044401548","display_name":"Bastian Koppelmann","orcid":null},"institutions":[{"id":"https://openalex.org/I206945453","display_name":"Paderborn University","ror":"https://ror.org/058kzsd48","country_code":"DE","type":"education","lineage":["https://openalex.org/I206945453"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Bastian Koppelmann","raw_affiliation_strings":["Paderborn University/Heinz Nixdorf Institute, Paderborn, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Paderborn University/Heinz Nixdorf Institute, Paderborn, Germany","institution_ids":["https://openalex.org/I206945453"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023301961","display_name":"Peer Adelt","orcid":null},"institutions":[{"id":"https://openalex.org/I206945453","display_name":"Paderborn University","ror":"https://ror.org/058kzsd48","country_code":"DE","type":"education","lineage":["https://openalex.org/I206945453"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Peer Adelt","raw_affiliation_strings":["Paderborn University/Heinz Nixdorf Institute, Paderborn, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Paderborn University/Heinz Nixdorf Institute, Paderborn, Germany","institution_ids":["https://openalex.org/I206945453"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110622459","display_name":"Wolfgang M\u00fcller","orcid":"https://orcid.org/0000-0001-6474-3733"},"institutions":[{"id":"https://openalex.org/I206945453","display_name":"Paderborn University","ror":"https://ror.org/058kzsd48","country_code":"DE","type":"education","lineage":["https://openalex.org/I206945453"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Wolfgang Mueller","raw_affiliation_strings":["Paderborn University/Heinz Nixdorf Institute, Paderborn, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Paderborn University/Heinz Nixdorf Institute, Paderborn, Germany","institution_ids":["https://openalex.org/I206945453"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5042898125","display_name":"J. Christoph Scheytt","orcid":"https://orcid.org/0000-0002-5950-6618"},"institutions":[{"id":"https://openalex.org/I206945453","display_name":"Paderborn University","ror":"https://ror.org/058kzsd48","country_code":"DE","type":"education","lineage":["https://openalex.org/I206945453"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Christoph Scheytt","raw_affiliation_strings":["Paderborn University/Heinz Nixdorf Institute, Paderborn, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Paderborn University/Heinz Nixdorf Institute, Paderborn, Germany","institution_ids":["https://openalex.org/I206945453"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5044401548"],"corresponding_institution_ids":["https://openalex.org/I206945453"],"apc_list":null,"apc_paid":null,"fwci":1.9744,"has_fulltext":false,"cited_by_count":21,"citation_normalized_percentile":{"value":0.86439605,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"41","last_page":"48"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.8322483897209167},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8055523037910461},{"id":"https://openalex.org/keywords/x86","display_name":"x86","score":0.7727142572402954},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6133959889411926},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.5988845825195312},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5400799512863159},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.46992385387420654},{"id":"https://openalex.org/keywords/32-bit","display_name":"32-bit","score":0.4663637578487396},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.4285689890384674},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.41610831022262573},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3487560451030731},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.28621989488601685},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.27887988090515137}],"concepts":[{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.8322483897209167},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8055523037910461},{"id":"https://openalex.org/C170723468","wikidata":"https://www.wikidata.org/wiki/Q182933","display_name":"x86","level":3,"score":0.7727142572402954},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6133959889411926},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.5988845825195312},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5400799512863159},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.46992385387420654},{"id":"https://openalex.org/C75695347","wikidata":"https://www.wikidata.org/wiki/Q225147","display_name":"32-bit","level":2,"score":0.4663637578487396},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.4285689890384674},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.41610831022262573},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3487560451030731},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.28621989488601685},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.27887988090515137}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/patmos.2019.8862170","is_oa":false,"landing_page_url":"https://doi.org/10.1109/patmos.2019.8862170","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W4976521","https://openalex.org/W189187018","https://openalex.org/W1686420892","https://openalex.org/W1964471912","https://openalex.org/W1967767709","https://openalex.org/W1983394510","https://openalex.org/W2081225288","https://openalex.org/W2129589372","https://openalex.org/W2132918567","https://openalex.org/W2479978724","https://openalex.org/W2739649174","https://openalex.org/W4285719527","https://openalex.org/W6607646341","https://openalex.org/W6637151178","https://openalex.org/W6721258214","https://openalex.org/W6987020231","https://openalex.org/W6987144925"],"related_works":["https://openalex.org/W4367172762","https://openalex.org/W3018525819","https://openalex.org/W2104997886","https://openalex.org/W2140576184","https://openalex.org/W2259207614","https://openalex.org/W4386211790","https://openalex.org/W1863515937","https://openalex.org/W2996530694","https://openalex.org/W1896855786","https://openalex.org/W3090596552"],"abstract_inverted_index":{"Embedded":[0],"systems":[1,50],"require":[2],"a":[3,142],"high":[4],"energy":[5],"efficiency":[6,29],"in":[7],"combination":[8,103],"with":[9],"an":[10,100],"optimized":[11],"performance.":[12],"As":[13],"such,":[14],"Bit":[15],"Manipulation":[16],"Instructions":[17],"(BMIs)":[18],"were":[19],"introduced":[20],"for":[21,37,48,68,83,139,145],"x86":[22,106],"and":[23,30,72,87,102,107,147],"ARMv8":[24,108],"to":[25],"improve":[26],"the":[27,34,41,69,84,88,125,129],"runtime":[28],"power":[31,148],"dissipation":[32],"of":[33,104,128],"compiled":[35],"software":[36,133],"various":[38],"applications.":[39,151],"Though":[40],"RISC-V":[42,70,94,117],"platform":[43],"is":[44],"meanwhile":[45],"widely":[46],"accepted":[47],"embedded":[49],"application,":[51],"its":[52],"instruction":[53],"set":[54],"architecture":[55],"(ISA)":[56],"currently":[57],"still":[58],"supports":[59],"only":[60],"two":[61],"basic":[62],"BMIs.We":[63],"introduce":[64],"ten":[65],"advanced":[66],"BMIs":[67],"ISA":[71],"implemented":[73],"them":[74],"on":[75,99,124],"Berkeley's":[76],"Rocket":[77,111],"CPU":[78,112],"[1],":[79],"which":[80],"we":[81,137],"synthesized":[82],"Artix-7":[85],"FPGA":[86],"TSMC":[89],"65nm":[90],"cell":[91],"library.":[92],"Our":[93,110,132],"BMI":[95,118],"definitions":[96],"are":[97],"based":[98],"analysis":[101],"existing":[105],"BMIs.":[109],"hardware":[113],"extensions":[114,119],"show":[115,135],"that":[116,136],"have":[120],"no":[121],"negative":[122],"impact":[123,144],"critical":[126],"path":[127],"execution":[130],"pipeline.":[131],"evaluations":[134],"can,":[138],"example,":[140],"expect":[141],"significant":[143],"time":[146],"consuming":[149],"cryptographic":[150]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":6},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":1}],"updated_date":"2026-04-29T09:16:38.111599","created_date":"2025-10-10T00:00:00"}