{"id":"https://openalex.org/W2582965610","doi":"https://doi.org/10.1109/patmos.2016.7833679","title":"RRAM variability and its mitigation schemes","display_name":"RRAM variability and its mitigation schemes","publication_year":2016,"publication_date":"2016-09-01","ids":{"openalex":"https://openalex.org/W2582965610","doi":"https://doi.org/10.1109/patmos.2016.7833679","mag":"2582965610"},"language":"en","primary_location":{"id":"doi:10.1109/patmos.2016.7833679","is_oa":false,"landing_page_url":"https://doi.org/10.1109/patmos.2016.7833679","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://hdl.handle.net/2117/103892","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5089945081","display_name":"Peyman Pouyan","orcid":"https://orcid.org/0000-0001-5774-1473"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":true,"raw_author_name":"Peyman Pouyan","raw_affiliation_strings":["Computer Engineering Lab, Delft, TU, Netherlands"],"affiliations":[{"raw_affiliation_string":"Computer Engineering Lab, Delft, TU, Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008961651","display_name":"E. Amat","orcid":"https://orcid.org/0000-0001-9214-0331"},"institutions":[{"id":"https://openalex.org/I4210136471","display_name":"FC Barcelona","ror":"https://ror.org/04bpz1v84","country_code":"ES","type":"other","lineage":["https://openalex.org/I4210136471"]},{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Esteve Amat","raw_affiliation_strings":["Department of Electronic Engineering UPC, Barcelona Tech, Barcelona, Spain"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering UPC, Barcelona Tech, Barcelona, Spain","institution_ids":["https://openalex.org/I9617848","https://openalex.org/I4210136471"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005739146","display_name":"Said Hamdioui","orcid":"https://orcid.org/0000-0002-8961-0387"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Said Hamdioui","raw_affiliation_strings":["Computer Engineering Lab, Delft, TU, Netherlands"],"affiliations":[{"raw_affiliation_string":"Computer Engineering Lab, Delft, TU, Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5063332575","display_name":"Antonio Rubio","orcid":"https://orcid.org/0000-0003-1625-1472"},"institutions":[{"id":"https://openalex.org/I4210136471","display_name":"FC Barcelona","ror":"https://ror.org/04bpz1v84","country_code":"ES","type":"other","lineage":["https://openalex.org/I4210136471"]},{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Antonio Rubio","raw_affiliation_strings":["Department of Electronic Engineering UPC, Barcelona Tech, Barcelona, Spain"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering UPC, Barcelona Tech, Barcelona, Spain","institution_ids":["https://openalex.org/I9617848","https://openalex.org/I4210136471"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5089945081"],"corresponding_institution_ids":["https://openalex.org/I98358874"],"apc_list":null,"apc_paid":null,"fwci":0.9295,"has_fulltext":true,"cited_by_count":24,"citation_normalized_percentile":{"value":0.79334361,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"141","last_page":"146"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.8602449893951416},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.7845240235328674},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6859846115112305},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.565051257610321},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.49891209602355957},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.42719578742980957},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4253816604614258},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.3448466658592224},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.34228014945983887},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.336265504360199},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2631465196609497},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24369394779205322},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.11751958727836609},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.09060612320899963}],"concepts":[{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.8602449893951416},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.7845240235328674},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6859846115112305},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.565051257610321},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.49891209602355957},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.42719578742980957},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4253816604614258},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.3448466658592224},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.34228014945983887},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.336265504360199},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2631465196609497},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24369394779205322},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.11751958727836609},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.09060612320899963},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/patmos.2016.7833679","is_oa":false,"landing_page_url":"https://doi.org/10.1109/patmos.2016.7833679","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","raw_type":"proceedings-article"},{"id":"pmh:oai:upcommons.upc.edu:2117/103892","is_oa":true,"landing_page_url":"https://hdl.handle.net/2117/103892","pdf_url":null,"source":{"id":"https://openalex.org/S4210207057","display_name":"QRU Quaderns de Recerca en Urbanisme","issn_l":"2014-9689","issn":["2014-9689","2385-6777"],"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310322448","host_organization_name":"Q71272178","host_organization_lineage":["https://openalex.org/P4310322448"],"host_organization_lineage_names":["Q71272178"],"type":"journal"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":null,"raw_type":"Conference report"},{"id":"pmh:oai:tudelft.nl:uuid:dd499c04-5ee8-4884-9b54-69f7b4f6e756","is_oa":true,"landing_page_url":"http://resolver.tudelft.nl/uuid:dd499c04-5ee8-4884-9b54-69f7b4f6e756","pdf_url":"http://resolver.tudelft.nl/uuid:dd499c04-5ee8-4884-9b54-69f7b4f6e756","source":{"id":"https://openalex.org/S4306400906","display_name":"Research Repository (Delft University of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I98358874","host_organization_name":"Delft University of Technology","host_organization_lineage":["https://openalex.org/I98358874"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"conference paper"}],"best_oa_location":{"id":"pmh:oai:upcommons.upc.edu:2117/103892","is_oa":true,"landing_page_url":"https://hdl.handle.net/2117/103892","pdf_url":null,"source":{"id":"https://openalex.org/S4210207057","display_name":"QRU Quaderns de Recerca en Urbanisme","issn_l":"2014-9689","issn":["2014-9689","2385-6777"],"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310322448","host_organization_name":"Q71272178","host_organization_lineage":["https://openalex.org/P4310322448"],"host_organization_lineage_names":["Q71272178"],"type":"journal"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":null,"raw_type":"Conference report"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G6043815090","display_name":null,"funder_award_id":"C3-2-R","funder_id":"https://openalex.org/F4320335322","funder_display_name":"European Regional Development Fund"}],"funders":[{"id":"https://openalex.org/F4320335322","display_name":"European Regional Development Fund","ror":"https://ror.org/00k4n6c32"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1833852352","https://openalex.org/W1943376429","https://openalex.org/W1971319818","https://openalex.org/W1977765713","https://openalex.org/W1983382740","https://openalex.org/W1987355931","https://openalex.org/W1999757151","https://openalex.org/W2004823737","https://openalex.org/W2009510324","https://openalex.org/W2010216838","https://openalex.org/W2013656496","https://openalex.org/W2013907282","https://openalex.org/W2018068167","https://openalex.org/W2022318845","https://openalex.org/W2035027123","https://openalex.org/W2059323493","https://openalex.org/W2059522723","https://openalex.org/W2129871911","https://openalex.org/W2143483829","https://openalex.org/W2157061035","https://openalex.org/W2165911664","https://openalex.org/W2168602049","https://openalex.org/W2252333749","https://openalex.org/W2526202524","https://openalex.org/W6646986558"],"related_works":["https://openalex.org/W2076211355","https://openalex.org/W2533127403","https://openalex.org/W2007070351","https://openalex.org/W2033811947","https://openalex.org/W2183989414","https://openalex.org/W1551399929","https://openalex.org/W2038212394","https://openalex.org/W2104937488","https://openalex.org/W2725431849","https://openalex.org/W2162174949"],"abstract_inverted_index":{"Emerging":[0],"technologies":[1],"such":[2],"as":[3,15],"RRAMs":[4],"are":[5],"attracting":[6],"significant":[7],"attention":[8],"due":[9,31],"to":[10,22,32,46],"their":[11],"tempting":[12],"characteristics":[13],"(such":[14],"high":[16],"scalability,":[17],"CMOS":[18],"compatibility":[19],"and":[20,41,57,68,89],"non-volatility)":[21],"replace":[23],"the":[24,47,55,64,69,76,82,96],"current":[25],"conventional":[26],"memories.":[27],"However,":[28],"process":[29,102],"variation":[30,72],"nano-scale":[33],"structure":[34],"poses":[35],"major":[36],"challenges":[37],"on":[38,86],"both":[39],"reliability":[40],"yield.":[42],"This":[43,60],"has":[44],"led":[45],"investigation":[48],"of":[49,84],"new":[50],"robust":[51],"design":[52],"strategies":[53],"at":[54,75],"circuit":[56,77,93],"system":[58],"level.":[59,78],"paper":[61],"first":[62],"reviews":[63],"RRAM":[65],"variability":[66,85],"phenomenon":[67],"state-of-the":[70],"art":[71],"tolerant":[73],"techniques":[74],"Thereafter,":[79],"it":[80],"analyzes":[81],"impact":[83],"memory":[87,98],"reliability,":[88],"proposes":[90],"a":[91],"variation-monitoring":[92],"that":[94],"discerns":[95],"reliable":[97],"cells":[99],"affected":[100],"by":[101],"variability.":[103]},"counts_by_year":[{"year":2025,"cited_by_count":5},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":2}],"updated_date":"2026-04-10T15:06:20.359241","created_date":"2017-02-03T00:00:00"}