{"id":"https://openalex.org/W2581690509","doi":"https://doi.org/10.1109/patmos.2016.7833429","title":"Secure cryptographic hardware implementation issues for high-performance applications","display_name":"Secure cryptographic hardware implementation issues for high-performance applications","publication_year":2016,"publication_date":"2016-09-01","ids":{"openalex":"https://openalex.org/W2581690509","doi":"https://doi.org/10.1109/patmos.2016.7833429","mag":"2581690509"},"language":"en","primary_location":{"id":"doi:10.1109/patmos.2016.7833429","is_oa":false,"landing_page_url":"https://doi.org/10.1109/patmos.2016.7833429","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043725292","display_name":"Erica Tena\u2010S\u00e1nchez","orcid":"https://orcid.org/0000-0002-8905-5715"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Erica Tena-Sanchez","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla)"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla)","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073626271","display_name":"Antonio J. Acosta","orcid":"https://orcid.org/0000-0002-7934-9162"},"institutions":[{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]},{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Antonio J. Acosta","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla)"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla)","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101455624","display_name":"Juan N\u00fa\u00f1ez","orcid":"https://orcid.org/0000-0002-0279-9472"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Juan Nunez","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla)"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla)","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5043725292"],"corresponding_institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"],"apc_list":null,"apc_paid":null,"fwci":0.4285,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.80632673,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"2014","issue":null,"first_page":"76","last_page":"83"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7907348871231079},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.7253130078315735},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.5726417899131775},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.5011022090911865},{"id":"https://openalex.org/keywords/cryptographic-primitive","display_name":"Cryptographic primitive","score":0.49548542499542236},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4928012192249298},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.4880043566226959},{"id":"https://openalex.org/keywords/side-channel-attack","display_name":"Side channel attack","score":0.4871334731578827},{"id":"https://openalex.org/keywords/power-analysis","display_name":"Power analysis","score":0.449947714805603},{"id":"https://openalex.org/keywords/cryptographic-protocol","display_name":"Cryptographic protocol","score":0.4392828941345215},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.41116490960121155},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3455407917499542},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.28985515236854553},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.2860543429851532},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.1600663959980011}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7907348871231079},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.7253130078315735},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.5726417899131775},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.5011022090911865},{"id":"https://openalex.org/C15927051","wikidata":"https://www.wikidata.org/wiki/Q246593","display_name":"Cryptographic primitive","level":4,"score":0.49548542499542236},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4928012192249298},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4880043566226959},{"id":"https://openalex.org/C49289754","wikidata":"https://www.wikidata.org/wiki/Q2267081","display_name":"Side channel attack","level":3,"score":0.4871334731578827},{"id":"https://openalex.org/C71743495","wikidata":"https://www.wikidata.org/wiki/Q2845210","display_name":"Power analysis","level":3,"score":0.449947714805603},{"id":"https://openalex.org/C33884865","wikidata":"https://www.wikidata.org/wiki/Q1254335","display_name":"Cryptographic protocol","level":3,"score":0.4392828941345215},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.41116490960121155},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3455407917499542},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.28985515236854553},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.2860543429851532},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.1600663959980011},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/patmos.2016.7833429","is_oa":false,"landing_page_url":"https://doi.org/10.1109/patmos.2016.7833429","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8700000047683716,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320335322","display_name":"European Regional Development Fund","ror":"https://ror.org/00k4n6c32"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":32,"referenced_works":["https://openalex.org/W1559687563","https://openalex.org/W1585665690","https://openalex.org/W1591088878","https://openalex.org/W1592625985","https://openalex.org/W1601789160","https://openalex.org/W1602420333","https://openalex.org/W1607006990","https://openalex.org/W1613874182","https://openalex.org/W1887481132","https://openalex.org/W1969758748","https://openalex.org/W1995730173","https://openalex.org/W2043391515","https://openalex.org/W2055876860","https://openalex.org/W2088326678","https://openalex.org/W2091604856","https://openalex.org/W2133198962","https://openalex.org/W2138724413","https://openalex.org/W2154800909","https://openalex.org/W2154909745","https://openalex.org/W2158457572","https://openalex.org/W2159868837","https://openalex.org/W2219812381","https://openalex.org/W2273399093","https://openalex.org/W2400281298","https://openalex.org/W4230737292","https://openalex.org/W6633568477","https://openalex.org/W6635520437","https://openalex.org/W6635937959","https://openalex.org/W6679615412","https://openalex.org/W6682554491","https://openalex.org/W6688738194","https://openalex.org/W6712790605"],"related_works":["https://openalex.org/W5280335","https://openalex.org/W2164725015","https://openalex.org/W2782264121","https://openalex.org/W4323926098","https://openalex.org/W4384807855","https://openalex.org/W2022533428","https://openalex.org/W182679101","https://openalex.org/W2125219685","https://openalex.org/W2425598453","https://openalex.org/W4244949874"],"abstract_inverted_index":{"In":[0],"this":[1,52],"paper":[2],"the":[3,43,47,58,61,81,101,108,116],"effect":[4],"of":[5,20,42,57,60,84,92,110],"high-performance":[6],"techniques":[7],"for":[8],"high":[9],"speed":[10],"applications":[11],"in":[12,46,90],"secure":[13],"cryptographic":[14,48],"implementations":[15,56],"is":[16,35],"studied.":[17],"The":[18],"use":[19],"dual":[21],"pre":[22],"charge":[23],"logic":[24],"styles":[25],"with":[26,29],"fine-grained":[27],"pipelining":[28],"an":[30,68],"overlapping":[31],"three-phase":[32],"clock":[33,44],"scheme":[34],"studied,":[36],"also":[37],"including":[38],"a":[39],"correct":[40],"distribution":[41],"signal":[45],"implementation.":[49],"To":[50],"make":[51],"study,":[53],"four":[54],"different":[55],"Sbox-9":[59],"Kasumi":[62],"algorithm":[63],"have":[64,75],"been":[65,76],"implemented":[66],"using":[67],"90nm":[69],"TSMC":[70],"technology.":[71],"Simulation-based":[72],"DPA":[73],"attacks":[74],"carried":[77],"out,":[78],"showing":[79],"how":[80],"proper":[82],"synchronization":[83],"data":[85],"signals":[86],"gives":[87],"better":[88],"results":[89],"terms":[91],"power":[93],"consumption":[94],"and":[95],"operating":[96],"frequency,":[97],"but":[98],"affects":[99],"negatively":[100],"security":[102],"against":[103],"side":[104],"channel":[105],"attacks,":[106],"decreasing":[107],"number":[109],"input":[111],"patterns":[112],"needed":[113],"to":[114],"disclosure":[115],"secret":[117],"key.":[118]},"counts_by_year":[{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}