{"id":"https://openalex.org/W2074326361","doi":"https://doi.org/10.1109/patmos.2014.6951909","title":"Design and test of a low-power 90nm XOR/XNOR gate for cryptographic applications","display_name":"Design and test of a low-power 90nm XOR/XNOR gate for cryptographic applications","publication_year":2014,"publication_date":"2014-09-01","ids":{"openalex":"https://openalex.org/W2074326361","doi":"https://doi.org/10.1109/patmos.2014.6951909","mag":"2074326361"},"language":"en","primary_location":{"id":"doi:10.1109/patmos.2014.6951909","is_oa":false,"landing_page_url":"https://doi.org/10.1109/patmos.2014.6951909","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043725292","display_name":"Erica Tena\u2010S\u00e1nchez","orcid":"https://orcid.org/0000-0002-8905-5715"},"institutions":[{"id":"https://openalex.org/I134820265","display_name":"Consejo Superior de Investigaciones Cient\u00edficas","ror":"https://ror.org/02gfc7t72","country_code":"ES","type":"government","lineage":["https://openalex.org/I134820265"]},{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Erica Tena-Sanchez","raw_affiliation_strings":["Universidad de Sevilla and Instituto de Microelectr\u00f3nica de Sevilla (IMSE-CNM-CSIC), Seville, Spain","Universidad de Sevilla and Instituto de Microelectr\u00f3nica de Sevilla, (IMSE-CNM-CSIC), Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universidad de Sevilla and Instituto de Microelectr\u00f3nica de Sevilla (IMSE-CNM-CSIC), Seville, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]},{"raw_affiliation_string":"Universidad de Sevilla and Instituto de Microelectr\u00f3nica de Sevilla, (IMSE-CNM-CSIC), Spain","institution_ids":["https://openalex.org/I134820265"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103554428","display_name":"Javier Castro","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Javier Castro","raw_affiliation_strings":["Anafocus Company, Seville, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Anafocus Company, Seville, Spain","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5073626271","display_name":"Antonio J. Acosta","orcid":"https://orcid.org/0000-0002-7934-9162"},"institutions":[{"id":"https://openalex.org/I134820265","display_name":"Consejo Superior de Investigaciones Cient\u00edficas","ror":"https://ror.org/02gfc7t72","country_code":"ES","type":"government","lineage":["https://openalex.org/I134820265"]},{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Antonio J. Acosta","raw_affiliation_strings":["Universidad de Sevilla and Instituto de Microelectr\u00f3nica de Sevilla (IMSE-CNM-CSIC), Seville, Spain","Universidad de Sevilla and Instituto de Microelectr\u00f3nica de Sevilla, (IMSE-CNM-CSIC), Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universidad de Sevilla and Instituto de Microelectr\u00f3nica de Sevilla (IMSE-CNM-CSIC), Seville, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]},{"raw_affiliation_string":"Universidad de Sevilla and Instituto de Microelectr\u00f3nica de Sevilla, (IMSE-CNM-CSIC), Spain","institution_ids":["https://openalex.org/I134820265"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.13362556,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/xnor-gate","display_name":"XNOR gate","score":0.9328538775444031},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6803947687149048},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.6160343885421753},{"id":"https://openalex.org/keywords/power-analysis","display_name":"Power analysis","score":0.6018677949905396},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.579546332359314},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.47719988226890564},{"id":"https://openalex.org/keywords/side-channel-attack","display_name":"Side channel attack","score":0.4718449115753174},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.39124536514282227},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18519842624664307},{"id":"https://openalex.org/keywords/nand-gate","display_name":"NAND gate","score":0.14133647084236145},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.10570955276489258}],"concepts":[{"id":"https://openalex.org/C57684291","wikidata":"https://www.wikidata.org/wiki/Q1336142","display_name":"XNOR gate","level":4,"score":0.9328538775444031},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6803947687149048},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.6160343885421753},{"id":"https://openalex.org/C71743495","wikidata":"https://www.wikidata.org/wiki/Q2845210","display_name":"Power analysis","level":3,"score":0.6018677949905396},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.579546332359314},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47719988226890564},{"id":"https://openalex.org/C49289754","wikidata":"https://www.wikidata.org/wiki/Q2267081","display_name":"Side channel attack","level":3,"score":0.4718449115753174},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39124536514282227},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18519842624664307},{"id":"https://openalex.org/C124296912","wikidata":"https://www.wikidata.org/wiki/Q575178","display_name":"NAND gate","level":3,"score":0.14133647084236145},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.10570955276489258}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/patmos.2014.6951909","is_oa":false,"landing_page_url":"https://doi.org/10.1109/patmos.2014.6951909","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8600000143051147}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1506423869","https://openalex.org/W1522716264","https://openalex.org/W1569380263","https://openalex.org/W1585665690","https://openalex.org/W1594464909","https://openalex.org/W1602420333","https://openalex.org/W1607006990","https://openalex.org/W1613874182","https://openalex.org/W1790072549","https://openalex.org/W1998540796","https://openalex.org/W2055876860","https://openalex.org/W2076432462","https://openalex.org/W2091604856","https://openalex.org/W2102653533","https://openalex.org/W2117956094","https://openalex.org/W2133198962","https://openalex.org/W2144630005","https://openalex.org/W2154909745","https://openalex.org/W2158457572","https://openalex.org/W4231098049","https://openalex.org/W6630308244","https://openalex.org/W6634118901","https://openalex.org/W6635937959","https://openalex.org/W6638075847","https://openalex.org/W6682554491"],"related_works":["https://openalex.org/W5280335","https://openalex.org/W4384807855","https://openalex.org/W2164725015","https://openalex.org/W4323926098","https://openalex.org/W2022533428","https://openalex.org/W2125219685","https://openalex.org/W182679101","https://openalex.org/W1968560271","https://openalex.org/W2081998479","https://openalex.org/W2043669269"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"the":[3,19,36,41,66,103,108,113],"design":[4],"of":[5,50,90,112],"a":[6,81,88],"XOR/XNOR":[7],"gate":[8,17,45],"for":[9,130],"low-power":[10],"cryptographic":[11,136],"applications":[12],"is":[13],"presented.":[14],"The":[15,43],"proposed":[16,104],"optimizes":[18],"SABL":[20,47],"(Sense":[21],"Amplifier":[22],"Based":[23],"Logic)":[24],"gate,":[25],"widely":[26],"used":[27],"in":[28,35,48,68,80,92,95,100,102,110,133],"cryptocircuit":[29],"implementations,":[30,125],"by":[31],"removing":[32],"residual":[33],"charge":[34],"pull-down":[37],"circuit":[38],"and":[39,56,77,98],"simplifying":[40],"pull-up.":[42],"resulting":[44],"improves":[46],"terms":[49],"area,":[51,93],"power":[52,96],"consumption,":[53,97],"propagation":[54],"delay":[55,101],"resilience":[57],"against":[58],"Differential":[59],"Power":[60],"Analysis":[61],"(DPA)":[62],"attacks.":[63],"To":[64,106],"demonstrate":[65,107],"gain":[67,109],"performances,":[69],"both":[70],"gates":[71],"have":[72,118],"been":[73,119],"designed,":[74],"physically":[75],"implemented":[76],"experimentally":[78],"characterized,":[79],"90nm":[82],"TSMC":[83],"technology.":[84],"Experimental":[85],"results":[86],"show":[87],"reduction":[89],"15%":[91],"12%":[94],"40%":[99],"gate.":[105],"security":[111],"proposal,":[114],"simulation-based":[115],"DPA":[116],"attacks":[117],"performed":[120],"on":[121],"respective":[122],"Kasumi":[123],"Sbox9":[124],"being":[126],"our":[127],"proposal":[128],"suitable":[129],"inmediate":[131],"application":[132],"high-performance":[134],"secure":[135],"applications.":[137]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
