{"id":"https://openalex.org/W1967946334","doi":"https://doi.org/10.1109/patmos.2014.6951877","title":"Hardware-assisted power estimation for design-stage processors using FPGA emulation","display_name":"Hardware-assisted power estimation for design-stage processors using FPGA emulation","publication_year":2014,"publication_date":"2014-09-01","ids":{"openalex":"https://openalex.org/W1967946334","doi":"https://doi.org/10.1109/patmos.2014.6951877","mag":"1967946334"},"language":"en","primary_location":{"id":"doi:10.1109/patmos.2014.6951877","is_oa":false,"landing_page_url":"https://doi.org/10.1109/patmos.2014.6951877","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5077906657","display_name":"Sebastian Hesselbarth","orcid":null},"institutions":[{"id":"https://openalex.org/I114112103","display_name":"Leibniz University Hannover","ror":"https://ror.org/0304hq317","country_code":"DE","type":"education","lineage":["https://openalex.org/I114112103"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Sebastian Hesselbarth","raw_affiliation_strings":["Institute of Microelectronic Systems Leibniz, Universit\u00e4t Hannover, Hannover, Germany","Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Appelstra\u00dfe 4, 30167, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronic Systems Leibniz, Universit\u00e4t Hannover, Hannover, Germany","institution_ids":["https://openalex.org/I114112103"]},{"raw_affiliation_string":"Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Appelstra\u00dfe 4, 30167, Germany","institution_ids":["https://openalex.org/I114112103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038313017","display_name":"Tim Baumgart","orcid":null},"institutions":[{"id":"https://openalex.org/I114112103","display_name":"Leibniz University Hannover","ror":"https://ror.org/0304hq317","country_code":"DE","type":"education","lineage":["https://openalex.org/I114112103"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Tim Baumgart","raw_affiliation_strings":["Institute of Microelectronic Systems Leibniz, Universit\u00e4t Hannover, Hannover, Germany","Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Appelstra\u00dfe 4, 30167, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronic Systems Leibniz, Universit\u00e4t Hannover, Hannover, Germany","institution_ids":["https://openalex.org/I114112103"]},{"raw_affiliation_string":"Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Appelstra\u00dfe 4, 30167, Germany","institution_ids":["https://openalex.org/I114112103"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016532646","display_name":"Holger Blume","orcid":"https://orcid.org/0000-0002-0640-6875"},"institutions":[{"id":"https://openalex.org/I114112103","display_name":"Leibniz University Hannover","ror":"https://ror.org/0304hq317","country_code":"DE","type":"education","lineage":["https://openalex.org/I114112103"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Holger Blume","raw_affiliation_strings":["Institute of Microelectronic Systems Leibniz, Universit\u00e4t Hannover, Hannover, Germany","Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Appelstra\u00dfe 4, 30167, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronic Systems Leibniz, Universit\u00e4t Hannover, Hannover, Germany","institution_ids":["https://openalex.org/I114112103"]},{"raw_affiliation_string":"Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Appelstra\u00dfe 4, 30167, Germany","institution_ids":["https://openalex.org/I114112103"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.9453,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.7409428,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"12","issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7633628845214844},{"id":"https://openalex.org/keywords/encoder","display_name":"Encoder","score":0.6758126616477966},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6300500631332397},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5879837870597839},{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.5495402812957764},{"id":"https://openalex.org/keywords/benchmarking","display_name":"Benchmarking","score":0.5052555203437805},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4797831177711487},{"id":"https://openalex.org/keywords/embedded-software","display_name":"Embedded software","score":0.4530690014362335},{"id":"https://openalex.org/keywords/hardware-emulation","display_name":"Hardware emulation","score":0.4119674861431122},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38458144664764404}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7633628845214844},{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.6758126616477966},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6300500631332397},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5879837870597839},{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.5495402812957764},{"id":"https://openalex.org/C86251818","wikidata":"https://www.wikidata.org/wiki/Q816754","display_name":"Benchmarking","level":2,"score":0.5052555203437805},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4797831177711487},{"id":"https://openalex.org/C154488198","wikidata":"https://www.wikidata.org/wiki/Q1335007","display_name":"Embedded software","level":3,"score":0.4530690014362335},{"id":"https://openalex.org/C94115699","wikidata":"https://www.wikidata.org/wiki/Q5656406","display_name":"Hardware emulation","level":3,"score":0.4119674861431122},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38458144664764404},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C144133560","wikidata":"https://www.wikidata.org/wiki/Q4830453","display_name":"Business","level":0,"score":0.0},{"id":"https://openalex.org/C162853370","wikidata":"https://www.wikidata.org/wiki/Q39809","display_name":"Marketing","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/patmos.2014.6951877","is_oa":false,"landing_page_url":"https://doi.org/10.1109/patmos.2014.6951877","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W194480874","https://openalex.org/W1964781643","https://openalex.org/W2030772244","https://openalex.org/W2091306634","https://openalex.org/W2104086123","https://openalex.org/W2110512765","https://openalex.org/W2115753002","https://openalex.org/W2119350858","https://openalex.org/W2121532505","https://openalex.org/W2125018715","https://openalex.org/W2129663297","https://openalex.org/W2130770024","https://openalex.org/W2138150578","https://openalex.org/W2150862507","https://openalex.org/W2160179803","https://openalex.org/W2169826970","https://openalex.org/W3149040107","https://openalex.org/W6679207229"],"related_works":["https://openalex.org/W2170071008","https://openalex.org/W2106791114","https://openalex.org/W2103996454","https://openalex.org/W3029775214","https://openalex.org/W2390650884","https://openalex.org/W2001552871","https://openalex.org/W2129151116","https://openalex.org/W2093057572","https://openalex.org/W2353557016","https://openalex.org/W2389398079"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"the":[3,23,42,45,70,141,224,230,234,237],"application":[4],"of":[5,47,60,69,152,163,196,236],"an":[6,19,135],"accurate":[7],"power":[8,32,38,49,72,79,100,123,169],"estimation":[9,46,170],"model":[10,43,73,118],"for":[11,92,105,111,134,223,229],"design-stage":[12],"processors":[13],"that":[14],"can":[15],"be":[16],"mapped":[17],"onto":[18],"FPGA":[20,112],"together":[21],"with":[22,125,183],"functional":[24,30],"emulation.":[25],"Based":[26],"on":[27,192],"a":[28,146,177,181],"hybrid":[29],"level":[31,37,77],"analysis":[33,39],"(FLPA)":[34],"and":[35,51,84,108,130,156,199,202,208,227],"instruction":[36],"(ILPA)":[40],"approach,":[41],"enables":[44],"application-specific":[48],"consumption":[50,101],"energy":[52,213],"per":[53,214],"task":[54,215],"at":[55],"very":[56],"early":[57],"design":[58,97],"stages":[59],"programmable":[61],"embedded":[62,137],"processors.":[63],"The":[64,99,116],"extremely":[65],"short":[66],"execution":[67,128],"time":[68,129,171],"emulated":[71],"compared":[74],"to":[75,87,127,176,221],"gate-transfer":[76],"(GTL)":[78],"simulation":[80,124],"allows":[81],"both":[82],"hardware":[83,209],"software":[85,194,207],"designers":[86],"constantly":[88],"optimize":[89],"their":[90],"implementations":[91,195],"low-power":[93],"iteratively":[94],"in":[95],"different":[96,193],"stages.":[98],"modeling":[102],"methodology":[103],"used":[104],"this":[106],"work":[107],"necessary":[109],"considerations":[110],"implementation":[113],"are":[114],"described.":[115],"presented":[117,238],"is":[119],"validated":[120],"against":[121],"GTL":[122],"respect":[126],"precision":[131],"by":[132,219],"benchmarking":[133],"exemplary":[136],"RISC":[138],"processor":[139,204],"core,":[140],"LEON2.":[142],"Benchmarking":[143],"results":[144],"yield":[145],"percentage":[147],"mean":[148,159],"absolute":[149],"error":[150,161],"(%MAE)":[151],"less":[153,164],"than":[154,165],"9%":[155],"normalized":[157],"root":[158],"square":[160],"(NRMSE)":[162],"6%":[166],"while":[167],"reducing":[168],"from":[172],"several":[173],"hours":[174],"down":[175],"few":[178],"milliseconds.":[179],"Finally,":[180],"case-study":[182],"varying":[184],"real-world":[185],"input":[186],"data":[187],"sizes":[188],"has":[189,216],"been":[190,217],"performed":[191],"JPEG":[197,225,231],"encoder":[198,226],"decoder":[200],"applications":[201],"optimized":[203],"core.":[205],"With":[206],"optimizations":[210],"applied,":[211],"required":[212],"reduced":[218],"up":[220],"46%":[222],"39%":[228],"decoder,":[232],"demonstrating":[233],"advantage":[235],"approach.":[239]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}