{"id":"https://openalex.org/W4244964007","doi":"https://doi.org/10.1109/pact.2003.1238000","title":"Efficient resource management during instruction scheduling for the EPIC architectures","display_name":"Efficient resource management during instruction scheduling for the EPIC architectures","publication_year":2004,"publication_date":"2004-03-22","ids":{"openalex":"https://openalex.org/W4244964007","doi":"https://doi.org/10.1109/pact.2003.1238000"},"language":"en","primary_location":{"id":"doi:10.1109/pact.2003.1238000","is_oa":false,"landing_page_url":"https://doi.org/10.1109/pact.2003.1238000","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Oceans 2002 Conference and Exhibition. Conference Proceedings (Cat. No.02CH37362)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5048371678","display_name":"D.-Y. Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"D.-Y. Chen","raw_affiliation_strings":["Intel Laboratories, Intel Corporation, CA, USA"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Intel Corporation, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033378624","display_name":"L. Liu","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"L. Liu","raw_affiliation_strings":["Intel Laboratories, Intel Corporation, CA, USA"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Intel Corporation, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5115594418","display_name":"Chen Fu","orcid":"https://orcid.org/0000-0002-7012-5357"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chen Fu","raw_affiliation_strings":["Institute of Computing Technology, Chinese Academy and Sciences, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Computing Technology, Chinese Academy and Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210090176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019557003","display_name":"Shuxin Yang","orcid":"https://orcid.org/0000-0002-6061-1351"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shuxin Yang","raw_affiliation_strings":["Institute of Computing Technology, Chinese Academy and Sciences, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Computing Technology, Chinese Academy and Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210090176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109870596","display_name":"Chengyong Wu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chengyong Wu","raw_affiliation_strings":["Institute of Computing Technology, Chinese Academy and Sciences, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Computing Technology, Chinese Academy and Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210090176"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5114176728","display_name":"R.D.-C. Ju","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R. Ju","raw_affiliation_strings":["Intel Laboratories, Intel Corporation, CA, USA"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Intel Corporation, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5048371678"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":0.5266,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.69815999,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"1","issue":null,"first_page":"36","last_page":"45"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10743","display_name":"Software Testing and Debugging Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8725826740264893},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.7301651239395142},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.6905790567398071},{"id":"https://openalex.org/keywords/epic","display_name":"EPIC","score":0.6247879862785339},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5898473858833313},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5302873253822327},{"id":"https://openalex.org/keywords/instruction-scheduling","display_name":"Instruction scheduling","score":0.4833909571170807},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.45090100169181824},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.41731923818588257},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.41724181175231934},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.404974102973938},{"id":"https://openalex.org/keywords/dynamic-priority-scheduling","display_name":"Dynamic priority scheduling","score":0.4016449451446533},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.27817481756210327},{"id":"https://openalex.org/keywords/two-level-scheduling","display_name":"Two-level scheduling","score":0.21865957975387573},{"id":"https://openalex.org/keywords/schedule","display_name":"Schedule","score":0.09895023703575134}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8725826740264893},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.7301651239395142},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.6905790567398071},{"id":"https://openalex.org/C115519274","wikidata":"https://www.wikidata.org/wiki/Q267903","display_name":"EPIC","level":2,"score":0.6247879862785339},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5898473858833313},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5302873253822327},{"id":"https://openalex.org/C73564150","wikidata":"https://www.wikidata.org/wiki/Q11417093","display_name":"Instruction scheduling","level":5,"score":0.4833909571170807},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.45090100169181824},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.41731923818588257},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.41724181175231934},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.404974102973938},{"id":"https://openalex.org/C107568181","wikidata":"https://www.wikidata.org/wiki/Q5319000","display_name":"Dynamic priority scheduling","level":3,"score":0.4016449451446533},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.27817481756210327},{"id":"https://openalex.org/C119948110","wikidata":"https://www.wikidata.org/wiki/Q7858726","display_name":"Two-level scheduling","level":4,"score":0.21865957975387573},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.09895023703575134},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C124952713","wikidata":"https://www.wikidata.org/wiki/Q8242","display_name":"Literature","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/pact.2003.1238000","is_oa":false,"landing_page_url":"https://doi.org/10.1109/pact.2003.1238000","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Oceans 2002 Conference and Exhibition. Conference Proceedings (Cat. No.02CH37362)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Decent work and economic growth","id":"https://metadata.un.org/sdg/8","score":0.4699999988079071}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W90084074","https://openalex.org/W113592950","https://openalex.org/W1603235298","https://openalex.org/W1866190373","https://openalex.org/W1965230397","https://openalex.org/W2075137135","https://openalex.org/W2082541519","https://openalex.org/W2084451631","https://openalex.org/W2118911512","https://openalex.org/W2123412205","https://openalex.org/W2123516374","https://openalex.org/W2129962996","https://openalex.org/W2177605905","https://openalex.org/W4229844781","https://openalex.org/W4234966520","https://openalex.org/W4244938410","https://openalex.org/W4245599225","https://openalex.org/W4247477554","https://openalex.org/W6604625653","https://openalex.org/W6636016509"],"related_works":["https://openalex.org/W2045177269","https://openalex.org/W2116582200","https://openalex.org/W1580752477","https://openalex.org/W2061453039","https://openalex.org/W4313066767","https://openalex.org/W1999927257","https://openalex.org/W2133085868","https://openalex.org/W4251394608","https://openalex.org/W4253895674","https://openalex.org/W2161845376"],"abstract_inverted_index":{"Effective":[0],"and":[1,4,24,97],"efficient":[2,16],"modelling":[3],"management":[5,71],"of":[6,27,56,127],"hardware":[7],"resources":[8],"have":[9,65],"always":[10],"been":[11],"critical":[12],"toward":[13],"generating":[14],"highly":[15],"code":[17],"in":[18,34,76],"optimizing":[19],"compilers.":[20],"The":[21],"instruction":[22,39,62,74,114,124],"templates":[23],"dispersal":[25],"rules":[26],"the":[28,68,73,77,82,121,123],"EPIC":[29,58,83],"architecture":[30,59],"add":[31],"new":[32],"complexity":[33],"managing":[35],"resource":[36,54,70,118],"constraints":[37,55],"to":[38,49,90,112],"scheduler.":[40],"We":[41,64],"extended":[42],"a":[43],"finite":[44],"state":[45],"automaton":[46],"(FSA)":[47],"approach":[48,87,129],"efficiently":[50],"manage":[51],"all":[52,103],"key":[53],"an":[57,107,113],"on-the-fly":[60],"during":[61],"scheduling.":[63],"fully":[66],"integrated":[67,86],"FSA-based":[69],"into":[72],"scheduler":[75,115],"Open":[78],"Research":[79],"Compiler":[80],"for":[81,102],"architecture.":[84],"Our":[85],"shows":[88],"up":[89],"12%":[91],"speedup":[92,99],"on":[93,100,106,134],"some":[94],"SPECint2000":[95,104],"benchmarks":[96,105],"4.5%":[98],"average":[101],"Itanium":[108],"machine":[109],"when":[110],"compares":[111],"with":[116],"decoupled":[117],"management.":[119],"In":[120],"meantime,":[122],"scheduling":[125],"time":[126],"our":[128],"is":[130],"reduced":[131],"by":[132],"4%":[133],"average.":[135]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
