{"id":"https://openalex.org/W2772234138","doi":"https://doi.org/10.1109/pacrim.2017.8121883","title":"A trace-driven analytical model with less profiling overhead for DRAM access latencies","display_name":"A trace-driven analytical model with less profiling overhead for DRAM access latencies","publication_year":2017,"publication_date":"2017-08-01","ids":{"openalex":"https://openalex.org/W2772234138","doi":"https://doi.org/10.1109/pacrim.2017.8121883","mag":"2772234138"},"language":"en","primary_location":{"id":"doi:10.1109/pacrim.2017.8121883","is_oa":false,"landing_page_url":"https://doi.org/10.1109/pacrim.2017.8121883","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100517743","display_name":"Fengying Sun","orcid":null},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Fengying Sun","raw_affiliation_strings":["National ASIC System Engineering Technology Research Center, Southeast University, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Technology Research Center, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046533774","display_name":"Kecheng Ji","orcid":null},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kecheng Ji","raw_affiliation_strings":["National ASIC System Engineering Technology Research Center, Southeast University, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Technology Research Center, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078395317","display_name":"Ming Ling","orcid":"https://orcid.org/0000-0002-8866-7189"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ming Ling","raw_affiliation_strings":["National ASIC System Engineering Technology Research Center, Southeast University, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Technology Research Center, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101499715","display_name":"Longxing Shi","orcid":"https://orcid.org/0000-0002-0629-7154"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Longxing Shi","raw_affiliation_strings":["National ASIC System Engineering Technology Research Center, Southeast University, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Technology Research Center, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5100517743"],"corresponding_institution_ids":["https://openalex.org/I76569877"],"apc_list":null,"apc_paid":null,"fwci":0.2253,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.53292059,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"39","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.9109362363815308},{"id":"https://openalex.org/keywords/profiling","display_name":"Profiling (computer programming)","score":0.7952266931533813},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7948282361030579},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5946075916290283},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.5298219323158264},{"id":"https://openalex.org/keywords/trace","display_name":"TRACE (psycholinguistics)","score":0.5018045902252197},{"id":"https://openalex.org/keywords/access-time","display_name":"Access time","score":0.41119053959846497},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.39587679505348206},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.38942205905914307},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.38199758529663086},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.18539494276046753},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1089504063129425},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.08041590452194214},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.0767764151096344}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.9109362363815308},{"id":"https://openalex.org/C187191949","wikidata":"https://www.wikidata.org/wiki/Q1138496","display_name":"Profiling (computer programming)","level":2,"score":0.7952266931533813},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7948282361030579},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5946075916290283},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.5298219323158264},{"id":"https://openalex.org/C75291252","wikidata":"https://www.wikidata.org/wiki/Q1315756","display_name":"TRACE (psycholinguistics)","level":2,"score":0.5018045902252197},{"id":"https://openalex.org/C194080101","wikidata":"https://www.wikidata.org/wiki/Q46306","display_name":"Access time","level":2,"score":0.41119053959846497},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39587679505348206},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.38942205905914307},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.38199758529663086},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.18539494276046753},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1089504063129425},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.08041590452194214},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.0767764151096344},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/pacrim.2017.8121883","is_oa":false,"landing_page_url":"https://doi.org/10.1109/pacrim.2017.8121883","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1496414880","https://openalex.org/W1515422725","https://openalex.org/W1686420892","https://openalex.org/W1980891674","https://openalex.org/W1983096721","https://openalex.org/W1984490927","https://openalex.org/W1986825865","https://openalex.org/W2052801483","https://openalex.org/W2077178780","https://openalex.org/W2111045724","https://openalex.org/W2117285153","https://openalex.org/W2123306627","https://openalex.org/W2140040762","https://openalex.org/W2147657366","https://openalex.org/W2156427650","https://openalex.org/W2162639668","https://openalex.org/W2296603398","https://openalex.org/W2613067490","https://openalex.org/W2614852291","https://openalex.org/W3125984961","https://openalex.org/W4232057168","https://openalex.org/W4235557873","https://openalex.org/W4243824582","https://openalex.org/W4292169167","https://openalex.org/W6629699775","https://openalex.org/W6637151178","https://openalex.org/W6738282062"],"related_works":["https://openalex.org/W4293430534","https://openalex.org/W2342813629","https://openalex.org/W3150934690","https://openalex.org/W4297812927","https://openalex.org/W2335743642","https://openalex.org/W2800412005","https://openalex.org/W1976244802","https://openalex.org/W4386903460","https://openalex.org/W2080843961","https://openalex.org/W2414926609"],"abstract_inverted_index":{"Due":[0],"to":[1,20,82,126,153,163,220],"the":[2,30,35,69,76,83,86,91,96,115,128,134,158,175,183,191,198,209],"painful":[3],"time":[4,171],"consuming":[5],"of":[6,11,37,61,66,79,186,201],"cycle-accurate":[7,221],"simulations,":[8],"analytical":[9,27,151],"modeling":[10],"DRAM":[12,31,39,56,84,92],"systems":[13],"has":[14],"been":[15],"becoming":[16],"an":[17,139],"effective":[18],"alternative":[19],"give":[21],"guidance":[22],"for":[23,182],"architecture":[24],"optimizations.":[25],"Some":[26],"models":[28,121],"forecast":[29],"performance":[32,93,116],"by":[33,54,107,216],"obtaining":[34],"proportions":[36],"different":[38,55],"command":[40],"appearances":[41],"from":[42],"memory":[43,80],"trace":[44],"profiling.":[45],"However,":[46],"existing":[47],"works":[48],"require":[49],"too":[50],"many":[51],"cases":[52,129],"composed":[53],"commands":[57],"which":[58],"need":[59],"lots":[60],"profiling":[62],"and":[63,89,155,196],"consume":[64],"much":[65,169],"time.":[67],"On":[68],"flip":[70],"side,":[71],"other":[72],"methods":[73],"assume":[74,133],"that":[75,130],"arrival":[77],"process":[78,211],"requests":[81],"satisfies":[85],"Poisson":[87],"distribution":[88],"estimate":[90,157],"based":[94,118],"on":[95,119],"queueing":[97],"theory.":[98],"The":[99],"assumption,":[100],"however,":[101],"will":[102],"be":[103,213],"shown":[104],"not":[105,123,125],"accurate":[106],"our":[108,166,187,202],"experiments":[109],"in":[110,144],"this":[111,145],"paper.":[112],"Not":[113],"surprisingly,":[114],"forecasting":[117,176,210],"these":[120],"is":[122,204],"accurate,":[124],"mention":[127],"some":[131],"researchers":[132],"DDR":[135,159],"access":[136,160],"latency":[137],"as":[138],"empirical":[140],"constant":[141],"value.":[142],"Hence,":[143],"paper,":[146],"we":[147],"propose":[148],"a":[149],"trace-driven":[150],"model":[152,167,203],"quickly":[154],"precisely":[156],"latency.":[161],"Compared":[162,189],"prior":[164],"studies,":[165],"requires":[168],"less":[170],"overhead":[172],"without":[173],"sacrificing":[174],"precision.":[177],"17":[178],"benchmarks":[179],"are":[180],"adopted":[181],"accuracy":[184,200],"evaluation":[185],"model.":[188],"with":[190],"simulation":[192],"results":[193],"using":[194],"Gem5":[195],"DRAMSim2,":[197],"average":[199],"higher":[205],"than":[206],"93.31%,":[207],"while":[208],"can":[212],"sped":[214],"up":[215],"x22":[217],"times":[218],"contrast":[219],"simulations.":[222]},"counts_by_year":[{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}