{"id":"https://openalex.org/W2158760843","doi":"https://doi.org/10.1109/olt.2002.1030193","title":"Analysis of SEU effects in a pipelined processor","display_name":"Analysis of SEU effects in a pipelined processor","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W2158760843","doi":"https://doi.org/10.1109/olt.2002.1030193","mag":"2158760843"},"language":"en","primary_location":{"id":"doi:10.1109/olt.2002.1030193","is_oa":false,"landing_page_url":"https://doi.org/10.1109/olt.2002.1030193","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Eighth IEEE International On-Line Testing Workshop (IOLTW 2002)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5076102072","display_name":"Maurizio Rebaudengo","orcid":"https://orcid.org/0000-0002-7135-7694"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M. Rebaudengo","raw_affiliation_strings":["Dipartimento di Automatica e Informatica, Politecnico di Turino, Torino, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Automatica e Informatica, Politecnico di Turino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058555274","display_name":"M. Sonza Reorda","orcid":"https://orcid.org/0000-0003-2899-7669"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M. Sonza Reorda","raw_affiliation_strings":["Dipartimento di Automatica e Informatica, Politecnico di Turino, Torino, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Automatica e Informatica, Politecnico di Turino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5087219426","display_name":"M. Violante","orcid":"https://orcid.org/0000-0002-5821-3418"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M. Violante","raw_affiliation_strings":["Dipartimento di Automatica e Informatica, Politecnico di Turino, Torino, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Automatica e Informatica, Politecnico di Turino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I177477856"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":31,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"112","last_page":"116"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10663","display_name":"Advanced Battery Technologies Research","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/2203","display_name":"Automotive Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8240220546722412},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.6860940456390381},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.6820370554924011},{"id":"https://openalex.org/keywords/pipeline-burst-cache","display_name":"Pipeline burst cache","score":0.5686282515525818},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5514567494392395},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5403002500534058},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5355302095413208},{"id":"https://openalex.org/keywords/pipeline-transport","display_name":"Pipeline transport","score":0.5289937257766724},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4623033106327057},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.44716182351112366},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.428632527589798},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.42486658692359924},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.42465662956237793},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.32217705249786377},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.29638808965682983},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2730783224105835},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.11812207102775574}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8240220546722412},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.6860940456390381},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.6820370554924011},{"id":"https://openalex.org/C157547923","wikidata":"https://www.wikidata.org/wiki/Q7197276","display_name":"Pipeline burst cache","level":5,"score":0.5686282515525818},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5514567494392395},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5403002500534058},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5355302095413208},{"id":"https://openalex.org/C175309249","wikidata":"https://www.wikidata.org/wiki/Q725864","display_name":"Pipeline transport","level":2,"score":0.5289937257766724},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4623033106327057},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.44716182351112366},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.428632527589798},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.42486658692359924},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.42465662956237793},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.32217705249786377},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.29638808965682983},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2730783224105835},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.11812207102775574},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C87717796","wikidata":"https://www.wikidata.org/wiki/Q146326","display_name":"Environmental engineering","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/olt.2002.1030193","is_oa":false,"landing_page_url":"https://doi.org/10.1109/olt.2002.1030193","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Eighth IEEE International On-Line Testing Workshop (IOLTW 2002)","raw_type":"proceedings-article"},{"id":"pmh:oai:porto.polito.it:1498954","is_oa":false,"landing_page_url":"http://porto.polito.it/1498954/","pdf_url":null,"source":{"id":"https://openalex.org/S4306402038","display_name":"PORTO Publications Open Repository TOrino (Politecnico di Torino)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I177477856","host_organization_name":"Politecnico di Torino","host_organization_lineage":["https://openalex.org/I177477856"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W217021","https://openalex.org/W1527573830","https://openalex.org/W1541483005","https://openalex.org/W1908654170","https://openalex.org/W2148156265","https://openalex.org/W2150634791","https://openalex.org/W6631631897","https://openalex.org/W6639821308"],"related_works":["https://openalex.org/W1547865754","https://openalex.org/W2276000909","https://openalex.org/W4250432526","https://openalex.org/W2101536355","https://openalex.org/W2171175484","https://openalex.org/W2085872434","https://openalex.org/W2562747857","https://openalex.org/W4308095153","https://openalex.org/W2026084820","https://openalex.org/W2940837694"],"abstract_inverted_index":{"Modern":[0],"processors":[1],"embed":[2],"features":[3],"such":[4],"as":[5],"pipelined":[6],"execution":[7],"units":[8],"and":[9,57,81],"cache":[10,82],"memories":[11,83],"that":[12,100],"can":[13],"hardly":[14],"be":[15],"controlled":[16],"by":[17],"programmers":[18],"through":[19],"the":[20,37,51,72,78,87,108],"processor":[21,69,79],"instruction":[22],"set.":[23],"As":[24],"a":[25,67],"result,":[26],"software-based":[27,94,101],"fault":[28],"injection":[29],"approaches":[30,95,102],"are":[31,46,84,90],"no":[32],"longer":[33],"suitable":[34],"for":[35],"assessing":[36],"effects":[38,52,73],"of":[39,53,66,74,112],"SEUs":[40,54,75],"in":[41,77],"modern":[42],"processors,":[43],"since":[44],"they":[45],"not":[47],"able":[48],"to":[49,105,114],"evaluate":[50],"affecting":[55],"pipelines":[56],"caches.":[58],"In":[59],"this":[60],"paper":[61],"we":[62],"report":[63],"an":[64],"analysis":[65],"commercial":[68],"core":[70],"where":[71],"located":[76],"pipeline":[80],"studied.":[85],"Moreover":[86],"obtained":[88],"results":[89,98],"compared":[91],"with":[92],"those":[93],"provide.":[96],"Experimental":[97],"show":[99],"may":[103],"lead":[104],"errors":[106],"during":[107],"failure":[109],"rate":[110],"estimation":[111],"up":[113],"400%.":[115]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
