{"id":"https://openalex.org/W4416925938","doi":"https://doi.org/10.1109/ojcas.2025.3639222","title":"A 30-70MHz Delay-Line-Based Multiphase 50A 5.14 A/mm\u00b2 Fully Integrated Voltage Regulator","display_name":"A 30-70MHz Delay-Line-Based Multiphase 50A 5.14 A/mm\u00b2 Fully Integrated Voltage Regulator","publication_year":2025,"publication_date":"2025-01-01","ids":{"openalex":"https://openalex.org/W4416925938","doi":"https://doi.org/10.1109/ojcas.2025.3639222"},"language":null,"primary_location":{"id":"doi:10.1109/ojcas.2025.3639222","is_oa":true,"landing_page_url":"https://doi.org/10.1109/ojcas.2025.3639222","pdf_url":null,"source":{"id":"https://openalex.org/S4210192473","display_name":"IEEE Open Journal of Circuits and Systems","issn_l":"2644-1225","issn":["2644-1225"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Open Journal of Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://doi.org/10.1109/ojcas.2025.3639222","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5070076182","display_name":"T Liu","orcid":"https://orcid.org/0009-0000-3461-624X"},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Tianshu Liu","raw_affiliation_strings":["College of Integrated Circuit, Zhejiang University, Hangzhou, China"],"raw_orcid":"https://orcid.org/0009-0000-3461-624X","affiliations":[{"raw_affiliation_string":"College of Integrated Circuit, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100375781","display_name":"Tao Zhang","orcid":"https://orcid.org/0000-0002-1711-2143"},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tao Zhang","raw_affiliation_strings":["College of Integrated Circuit, Zhejiang University, Hangzhou, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"College of Integrated Circuit, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088806726","display_name":"Yukan Du","orcid":"https://orcid.org/0000-0002-5271-9805"},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yukan Du","raw_affiliation_strings":["College of Integrated Circuit, Zhejiang University, Hangzhou, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"College of Integrated Circuit, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5069121787","display_name":"Wanyuan Qu","orcid":"https://orcid.org/0000-0002-8318-9878"},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wanyuan Qu","raw_affiliation_strings":["College of Integrated Circuit, Zhejiang University, Hangzhou, China"],"raw_orcid":"https://orcid.org/0000-0002-8318-9878","affiliations":[{"raw_affiliation_string":"College of Integrated Circuit, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5070076182"],"corresponding_institution_ids":["https://openalex.org/I76130692"],"apc_list":{"value":1750,"currency":"USD","value_usd":1750},"apc_paid":{"value":1750,"currency":"USD","value_usd":1750},"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.35873354,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"6","issue":null,"first_page":"520","last_page":"529"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.8870000243186951,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.8870000243186951,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.032999999821186066,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10175","display_name":"Advanced DC-DC Converters","score":0.0210999995470047,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/inductor","display_name":"Inductor","score":0.614300012588501},{"id":"https://openalex.org/keywords/duty-cycle","display_name":"Duty cycle","score":0.5934000015258789},{"id":"https://openalex.org/keywords/buck-converter","display_name":"Buck converter","score":0.5756999850273132},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4871000051498413},{"id":"https://openalex.org/keywords/current","display_name":"Current (fluid)","score":0.4805999994277954},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.47769999504089355},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.477400004863739},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.4449999928474426},{"id":"https://openalex.org/keywords/phase-margin","display_name":"Phase margin","score":0.42820000648498535}],"concepts":[{"id":"https://openalex.org/C144534570","wikidata":"https://www.wikidata.org/wiki/Q5325","display_name":"Inductor","level":3,"score":0.614300012588501},{"id":"https://openalex.org/C199822604","wikidata":"https://www.wikidata.org/wiki/Q557120","display_name":"Duty cycle","level":3,"score":0.5934000015258789},{"id":"https://openalex.org/C150818752","wikidata":"https://www.wikidata.org/wiki/Q83804","display_name":"Buck converter","level":3,"score":0.5756999850273132},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.48910000920295715},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4871000051498413},{"id":"https://openalex.org/C148043351","wikidata":"https://www.wikidata.org/wiki/Q4456944","display_name":"Current (fluid)","level":2,"score":0.4805999994277954},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.47769999504089355},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.477400004863739},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.45590001344680786},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.4449999928474426},{"id":"https://openalex.org/C81455027","wikidata":"https://www.wikidata.org/wiki/Q7180955","display_name":"Phase margin","level":5,"score":0.42820000648498535},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.37380000948905945},{"id":"https://openalex.org/C55000061","wikidata":"https://www.wikidata.org/wiki/Q24894777","display_name":"Current sensor","level":3,"score":0.34139999747276306},{"id":"https://openalex.org/C92746544","wikidata":"https://www.wikidata.org/wiki/Q585184","display_name":"Pulse-width modulation","level":3,"score":0.34130001068115234},{"id":"https://openalex.org/C137488568","wikidata":"https://www.wikidata.org/wiki/Q5321","display_name":"Resistor","level":3,"score":0.3407999873161316},{"id":"https://openalex.org/C123079801","wikidata":"https://www.wikidata.org/wiki/Q750240","display_name":"Modulation (music)","level":2,"score":0.325300008058548},{"id":"https://openalex.org/C2982819079","wikidata":"https://www.wikidata.org/wiki/Q1185136","display_name":"Peak current","level":4,"score":0.32109999656677246},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.31859999895095825},{"id":"https://openalex.org/C64424096","wikidata":"https://www.wikidata.org/wiki/Q750454","display_name":"Power factor","level":3,"score":0.31220000982284546},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.3019999861717224},{"id":"https://openalex.org/C78336795","wikidata":"https://www.wikidata.org/wiki/Q760134","display_name":"Boost converter","level":3,"score":0.2987000048160553},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.2904999852180481},{"id":"https://openalex.org/C165064840","wikidata":"https://www.wikidata.org/wiki/Q1321061","display_name":"Matching (statistics)","level":2,"score":0.28630000352859497},{"id":"https://openalex.org/C2989427145","wikidata":"https://www.wikidata.org/wiki/Q260295","display_name":"Single phase","level":2,"score":0.28450000286102295},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2842999994754791},{"id":"https://openalex.org/C110706871","wikidata":"https://www.wikidata.org/wiki/Q851210","display_name":"Voltage regulator","level":3,"score":0.27869999408721924},{"id":"https://openalex.org/C129014197","wikidata":"https://www.wikidata.org/wiki/Q906544","display_name":"Power semiconductor device","level":3,"score":0.26440000534057617},{"id":"https://openalex.org/C173871940","wikidata":"https://www.wikidata.org/wiki/Q471846","display_name":"Three-phase","level":3,"score":0.260699987411499},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.2590000033378601},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.25850000977516174}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ojcas.2025.3639222","is_oa":true,"landing_page_url":"https://doi.org/10.1109/ojcas.2025.3639222","pdf_url":null,"source":{"id":"https://openalex.org/S4210192473","display_name":"IEEE Open Journal of Circuits and Systems","issn_l":"2644-1225","issn":["2644-1225"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Open Journal of Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1109/ojcas.2025.3639222","is_oa":true,"landing_page_url":"https://doi.org/10.1109/ojcas.2025.3639222","pdf_url":null,"source":{"id":"https://openalex.org/S4210192473","display_name":"IEEE Open Journal of Circuits and Systems","issn_l":"2644-1225","issn":["2644-1225"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Open Journal of Circuits and Systems","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G3483912603","display_name":null,"funder_award_id":"62274147","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G4075270565","display_name":null,"funder_award_id":"92473106","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1827046939","https://openalex.org/W1990884219","https://openalex.org/W2170493514","https://openalex.org/W2172564620","https://openalex.org/W2180360041","https://openalex.org/W2552288005","https://openalex.org/W2916419066","https://openalex.org/W2922307880","https://openalex.org/W3102007617","https://openalex.org/W3135080476","https://openalex.org/W3184944198","https://openalex.org/W4221112990","https://openalex.org/W4235055490","https://openalex.org/W4289538996","https://openalex.org/W4313203492","https://openalex.org/W4392739488","https://openalex.org/W4396575073","https://openalex.org/W4396593771"],"related_works":[],"abstract_inverted_index":{"This":[0],"paper":[1],"introduces":[2],"a":[3,19,27,52,96,103,118,125,131],"fully":[4],"integrated":[5],"4-phase":[6],"16-channel":[7],"Buck":[8],"converter":[9,25,123],"capable":[10],"of":[11,16,99,107,115,128,134],"delivering":[12],"up":[13],"to":[14,58,74,81,149],"50A":[15],"current":[17,49,63,106,113,142],"with":[18,109],"vertical":[20,77,85],"power":[21,86,168],"delivery":[22],"structure.":[23],"The":[24,139],"employs":[26],"delay-linebased":[28],"pulse-width":[29],"modulation":[30],"scheme,":[31],"which":[32],"ensures":[33],"decent":[34],"duty":[35],"cycle":[36],"matching":[37],"across":[38,144],"all":[39,66,145],"phases.":[40],"To":[41],"further":[42],"enhance":[43],"performance,":[44],"an":[45,110],"accurate":[46],"high-speed":[47],"full-wave":[48],"sensor":[50],"and":[51,61,101,130],"current-balance":[53],"feedback":[54],"loop":[55],"are":[56,72],"incorporated":[57],"actively":[59],"regulate":[60],"balance":[62],"distribution":[64],"among":[65],"16":[67],"channels.":[68],"Furthermore,":[69],"substrate":[70],"metals":[71],"adopted":[73],"implement":[75],"the":[76,83,93,122,152,160],"3D":[78],"air-core":[79],"inductors":[80],"verify":[82],"proposed":[84,161],"delivery.":[87],"Fabricated":[88],"in":[89,170],"28nm":[90],"CMOS":[91],"technology,":[92],"prototype":[94],"achieves":[95],"peak":[97],"efficiency":[98],"87%":[100],"supports":[102],"maximum":[104],"load":[105,154],"50A,":[108],"impressive":[111],"die-area":[112],"density":[114],"5.14A/mm2.":[116],"Under":[117],"50MHz":[119],"switching":[120],"frequency,":[121],"exhibits":[124],"measured":[126],"bandwidth":[127],"7.1MHz":[129],"phase":[132],"margin":[133],"550,":[135],"demonstrating":[136],"robust":[137],"stability.":[138],"worst-case":[140],"average":[141],"imbalance":[143],"phases":[146],"is":[147,163],"limited":[148],"10.7%":[150],"over":[151],"full":[153],"range.":[155],"These":[156],"results":[157],"indicate":[158],"that":[159],"design":[162],"highly":[164],"suitable":[165],"for":[166],"highdensity":[167],"management":[169],"advanced":[171],"multi-core":[172],"System-on-Chips":[173],"(SoCs).":[174]},"counts_by_year":[],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-12-02T00:00:00"}
