{"id":"https://openalex.org/W4405439886","doi":"https://doi.org/10.1109/ojcas.2024.3451530","title":"V2Va +: An Efficient SystemVerilog &amp; Verilog-to-Verilog-A Translator for Accelerated Mixed-Signal Simulation","display_name":"V2Va +: An Efficient SystemVerilog &amp; Verilog-to-Verilog-A Translator for Accelerated Mixed-Signal Simulation","publication_year":2024,"publication_date":"2024-01-01","ids":{"openalex":"https://openalex.org/W4405439886","doi":"https://doi.org/10.1109/ojcas.2024.3451530"},"language":"en","primary_location":{"id":"doi:10.1109/ojcas.2024.3451530","is_oa":true,"landing_page_url":"https://doi.org/10.1109/ojcas.2024.3451530","pdf_url":null,"source":{"id":"https://openalex.org/S4210192473","display_name":"IEEE Open Journal of Circuits and Systems","issn_l":"2644-1225","issn":["2644-1225"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Open Journal of Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://doi.org/10.1109/ojcas.2024.3451530","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100407087","display_name":"Chao Wang","orcid":"https://orcid.org/0000-0003-0526-0250"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Chao Wang","raw_affiliation_strings":["Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111186523","display_name":"Yicong Shao","orcid":null},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yicong Shao","raw_affiliation_strings":["Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078462204","display_name":"Jiajie Huang","orcid":"https://orcid.org/0000-0003-4343-0425"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jiajie Huang","raw_affiliation_strings":["Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022867604","display_name":"Wangzilu Lu","orcid":"https://orcid.org/0000-0003-0046-9004"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wangzilu Lu","raw_affiliation_strings":["Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056077578","display_name":"Zhiwen Gu","orcid":"https://orcid.org/0000-0002-1734-389X"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhiwen Gu","raw_affiliation_strings":["Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088050221","display_name":"Longfan Li","orcid":"https://orcid.org/0000-0001-9557-7096"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Longfan Li","raw_affiliation_strings":["Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100321500","display_name":"Yuhang Zhang","orcid":"https://orcid.org/0000-0002-4101-6207"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuhang Zhang","raw_affiliation_strings":["Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045329560","display_name":"Jian Zhao","orcid":"https://orcid.org/0000-0003-2140-1236"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jian Zhao","raw_affiliation_strings":["Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101772736","display_name":"Wei Mao","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wei Mao","raw_affiliation_strings":["Hangzhou Institute of Technology, Xidian University, Hangzhou, China"],"affiliations":[{"raw_affiliation_string":"Hangzhou Institute of Technology, Xidian University, Hangzhou, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100764158","display_name":"Yongfu Li","orcid":"https://orcid.org/0000-0002-6322-8614"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yongfu Li","raw_affiliation_strings":["Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":10,"corresponding_author_ids":["https://openalex.org/A5100407087"],"corresponding_institution_ids":["https://openalex.org/I183067930"],"apc_list":{"value":1750,"currency":"USD","value_usd":1750},"apc_paid":{"value":1750,"currency":"USD","value_usd":1750},"fwci":0.481,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.6627241,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":98},"biblio":{"volume":"5","issue":null,"first_page":"387","last_page":"397"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.8587999939918518,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.8587999939918518,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.9139804840087891},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6979466080665588},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.5917866230010986},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.33770906925201416},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.225949227809906},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.10668283700942993}],"concepts":[{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.9139804840087891},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6979466080665588},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.5917866230010986},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33770906925201416},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.225949227809906},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.10668283700942993}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/ojcas.2024.3451530","is_oa":true,"landing_page_url":"https://doi.org/10.1109/ojcas.2024.3451530","pdf_url":null,"source":{"id":"https://openalex.org/S4210192473","display_name":"IEEE Open Journal of Circuits and Systems","issn_l":"2644-1225","issn":["2644-1225"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Open Journal of Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:e14a5a49011d436f864ed4023f14671e","is_oa":true,"landing_page_url":"https://doaj.org/article/e14a5a49011d436f864ed4023f14671e","pdf_url":null,"source":{"id":"https://openalex.org/S112646816","display_name":"SHILAP Revista de lepidopterolog\u00eda","issn_l":"0300-5267","issn":["0300-5267","2340-4078"],"is_oa":true,"is_in_doaj":true,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Open Journal of Circuits and Systems, Vol 5, Pp 387-397 (2024)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1109/ojcas.2024.3451530","is_oa":true,"landing_page_url":"https://doi.org/10.1109/ojcas.2024.3451530","pdf_url":null,"source":{"id":"https://openalex.org/S4210192473","display_name":"IEEE Open Journal of Circuits and Systems","issn_l":"2644-1225","issn":["2644-1225"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Open Journal of Circuits and Systems","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G3952726810","display_name":null,"funder_award_id":"62304133","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G8873581579","display_name":null,"funder_award_id":"62350610271","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320326930","display_name":"State Key Laboratory of Power Systems","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":41,"referenced_works":["https://openalex.org/W616429135","https://openalex.org/W1580024056","https://openalex.org/W1882977959","https://openalex.org/W1921417369","https://openalex.org/W1999261012","https://openalex.org/W2086376934","https://openalex.org/W2097814282","https://openalex.org/W2103132688","https://openalex.org/W2128342801","https://openalex.org/W2144390025","https://openalex.org/W2151271790","https://openalex.org/W2161961045","https://openalex.org/W2535987264","https://openalex.org/W2542664018","https://openalex.org/W2546244366","https://openalex.org/W2586354231","https://openalex.org/W2763053266","https://openalex.org/W2876590830","https://openalex.org/W2980541622","https://openalex.org/W3001525258","https://openalex.org/W3008954557","https://openalex.org/W3026151717","https://openalex.org/W3090299369","https://openalex.org/W3107618978","https://openalex.org/W3111684448","https://openalex.org/W3114909710","https://openalex.org/W3173464079","https://openalex.org/W3173897009","https://openalex.org/W3216000008","https://openalex.org/W4236592446","https://openalex.org/W4288754214","https://openalex.org/W4310447811","https://openalex.org/W4318685708","https://openalex.org/W4383340423","https://openalex.org/W4389429092","https://openalex.org/W4389776171","https://openalex.org/W4390549871","https://openalex.org/W4393853189","https://openalex.org/W4396564410","https://openalex.org/W4396949230","https://openalex.org/W6704530538"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W4391913857","https://openalex.org/W2358668433","https://openalex.org/W4396701345","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W2381510423"],"abstract_inverted_index":{"This":[0],"paper":[1],"introduces":[2],"a":[3,34,52,74,87,110],"streamlined":[4],"SystemVerilog":[5,18,82],"&":[6],"Verilog-to-Verilog-A":[7],"(V2Va":[8],"+)":[9],"translation":[10,68],"tool":[11,69],"that":[12],"automates":[13],"the":[14,49,146],"conversion":[15],"of":[16,28,36,61,113,128,148],"synthesizable":[17],"and":[19,30,57,83,86,104,121,143],"Verilog":[20,84],"code":[21],"into":[22],"Verilog-A":[23,88,94],"code,":[24],"enabling":[25],"concurrent":[26],"simulation":[27,55,124],"analog":[29,46],"digital":[31],"circuits.":[32],"Through":[33],"set":[35],"mapping":[37],"rules,":[38],"V2Va":[39,66,96],"+":[40,67,97],"facilitates":[41],"mixed-signal":[42,54],"simulations":[43],"in":[44,99,145],"an":[45],"environment,":[47],"negating":[48],"requirement":[50],"for":[51,91],"separate":[53],"engine":[56],"overcoming":[58],"multiple":[59],"types":[60],"EDA":[62],"licensing":[63],"obstacles.":[64],"The":[65],"comprises":[70],"two":[71],"integral":[72],"components:":[73],"parser":[75],"function,":[76],"tasked":[77],"with":[78],"extracting":[79],"information":[80],"from":[81],"files,":[85],"generator,":[89],"responsible":[90],"generating":[92],"corresponding":[93],"code.":[95],"excels":[98],"handling":[100],"complexity,":[101],"ensuring":[102],"accuracy,":[103],"improving":[105],"efficiency.":[106],"It":[107],"effectively":[108],"manages":[109],"wide":[111],"range":[112],"design":[114],"complexities,":[115],"maintains":[116],"functional":[117],"consistency":[118],"during":[119],"translation,":[120],"significantly":[122],"reduces":[123],"time,":[125],"achieving":[126],"speed-ups":[127],"over":[129],"<inline-formula":[130],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[131],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[132],"<tex-math":[133],"notation=\"LaTeX\">$2{\\times":[134],"}$":[135],"</tex-math></inline-formula>.":[136],"These":[137],"strengths":[138],"underscore":[139],"its":[140],"significant":[141],"impact":[142],"applicability":[144],"domain":[147],"circuit":[149],"design.":[150]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-04-11T08:14:18.477133","created_date":"2025-10-10T00:00:00"}