{"id":"https://openalex.org/W3122144106","doi":"https://doi.org/10.1109/ojcas.2020.3047225","title":"A Power Efficiency Enhancements of a Multi-Bit Accelerator for Memory Prohibitive Deep Neural Networks","display_name":"A Power Efficiency Enhancements of a Multi-Bit Accelerator for Memory Prohibitive Deep Neural Networks","publication_year":2021,"publication_date":"2021-01-01","ids":{"openalex":"https://openalex.org/W3122144106","doi":"https://doi.org/10.1109/ojcas.2020.3047225","mag":"3122144106"},"language":"en","primary_location":{"id":"doi:10.1109/ojcas.2020.3047225","is_oa":true,"landing_page_url":"https://doi.org/10.1109/ojcas.2020.3047225","pdf_url":"https://ieeexplore.ieee.org/ielx7/8784029/9314963/09335311.pdf","source":{"id":"https://openalex.org/S4210192473","display_name":"IEEE Open Journal of Circuits and Systems","issn_l":"2644-1225","issn":["2644-1225"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Open Journal of Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://ieeexplore.ieee.org/ielx7/8784029/9314963/09335311.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5075540562","display_name":"Suhas Shivapakash","orcid":"https://orcid.org/0000-0002-9173-213X"},"institutions":[{"id":"https://openalex.org/I4577782","display_name":"Technische Universit\u00e4t Berlin","ror":"https://ror.org/03v4gjf40","country_code":"DE","type":"education","lineage":["https://openalex.org/I4577782"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Suhas Shivapakash","raw_affiliation_strings":["Chair of Mixed Signal Circuit Design, Technical University of Berlin, Berlin, Germany"],"raw_orcid":"https://orcid.org/0000-0002-9173-213X","affiliations":[{"raw_affiliation_string":"Chair of Mixed Signal Circuit Design, Technical University of Berlin, Berlin, Germany","institution_ids":["https://openalex.org/I4577782"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054827934","display_name":"Hardik Jain","orcid":"https://orcid.org/0000-0001-9499-8040"},"institutions":[{"id":"https://openalex.org/I4577782","display_name":"Technische Universit\u00e4t Berlin","ror":"https://ror.org/03v4gjf40","country_code":"DE","type":"education","lineage":["https://openalex.org/I4577782"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Hardik Jain","raw_affiliation_strings":["Computer Vision and Remote Sensing, Technical University of Berlin, Berlin, Germany"],"raw_orcid":"https://orcid.org/0000-0001-9499-8040","affiliations":[{"raw_affiliation_string":"Computer Vision and Remote Sensing, Technical University of Berlin, Berlin, Germany","institution_ids":["https://openalex.org/I4577782"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081055268","display_name":"Olaf Hellwich","orcid":"https://orcid.org/0000-0002-2871-9266"},"institutions":[{"id":"https://openalex.org/I4577782","display_name":"Technische Universit\u00e4t Berlin","ror":"https://ror.org/03v4gjf40","country_code":"DE","type":"education","lineage":["https://openalex.org/I4577782"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Olaf Hellwich","raw_affiliation_strings":["Computer Vision and Remote Sensing, Technical University of Berlin, Berlin, Germany"],"raw_orcid":"https://orcid.org/0000-0002-2871-9266","affiliations":[{"raw_affiliation_string":"Computer Vision and Remote Sensing, Technical University of Berlin, Berlin, Germany","institution_ids":["https://openalex.org/I4577782"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032302022","display_name":"Friedel Gerfers","orcid":"https://orcid.org/0000-0002-0520-1923"},"institutions":[{"id":"https://openalex.org/I4577782","display_name":"Technische Universit\u00e4t Berlin","ror":"https://ror.org/03v4gjf40","country_code":"DE","type":"education","lineage":["https://openalex.org/I4577782"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Friedel Gerfers","raw_affiliation_strings":["Chair of Mixed Signal Circuit Design, Technical University of Berlin, Berlin, Germany"],"raw_orcid":"https://orcid.org/0000-0002-0520-1923","affiliations":[{"raw_affiliation_string":"Chair of Mixed Signal Circuit Design, Technical University of Berlin, Berlin, Germany","institution_ids":["https://openalex.org/I4577782"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":1750,"currency":"USD","value_usd":1750},"apc_paid":{"value":1750,"currency":"USD","value_usd":1750},"fwci":1.1643,"has_fulltext":true,"cited_by_count":13,"citation_normalized_percentile":{"value":0.79951936,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":98},"biblio":{"volume":"2","issue":null,"first_page":"156","last_page":"169"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12702","display_name":"Brain Tumor Detection and Classification","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/2808","display_name":"Neurology"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T11689","display_name":"Adversarial Robustness in Machine Learning","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7873861789703369},{"id":"https://openalex.org/keywords/convolutional-neural-network","display_name":"Convolutional neural network","score":0.5451043248176575},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.5218959450721741},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5169596076011658},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5065430402755737},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4870367646217346},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.4721653163433075},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.4637063145637512},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.44948041439056396},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.4374054968357086},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.4370560646057129},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.4238555431365967},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.41787755489349365},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.41046595573425293},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.36789172887802124},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.138502299785614},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12533819675445557},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.11047381162643433},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09687188267707825}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7873861789703369},{"id":"https://openalex.org/C81363708","wikidata":"https://www.wikidata.org/wiki/Q17084460","display_name":"Convolutional neural network","level":2,"score":0.5451043248176575},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.5218959450721741},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5169596076011658},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5065430402755737},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4870367646217346},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.4721653163433075},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.4637063145637512},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.44948041439056396},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.4374054968357086},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.4370560646057129},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.4238555431365967},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.41787755489349365},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.41046595573425293},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.36789172887802124},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.138502299785614},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12533819675445557},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.11047381162643433},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09687188267707825},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/ojcas.2020.3047225","is_oa":true,"landing_page_url":"https://doi.org/10.1109/ojcas.2020.3047225","pdf_url":"https://ieeexplore.ieee.org/ielx7/8784029/9314963/09335311.pdf","source":{"id":"https://openalex.org/S4210192473","display_name":"IEEE Open Journal of Circuits and Systems","issn_l":"2644-1225","issn":["2644-1225"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Open Journal of Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:d49c593f68e7493ea26fa05032266638","is_oa":true,"landing_page_url":"https://doaj.org/article/d49c593f68e7493ea26fa05032266638","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-sa","license_id":"https://openalex.org/licenses/cc-by-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Open Journal of Circuits and Systems, Vol 2, Pp 156-169 (2021)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1109/ojcas.2020.3047225","is_oa":true,"landing_page_url":"https://doi.org/10.1109/ojcas.2020.3047225","pdf_url":"https://ieeexplore.ieee.org/ielx7/8784029/9314963/09335311.pdf","source":{"id":"https://openalex.org/S4210192473","display_name":"IEEE Open Journal of Circuits and Systems","issn_l":"2644-1225","issn":["2644-1225"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Open Journal of Circuits and Systems","raw_type":"journal-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8700000047683716}],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W3122144106.pdf","grobid_xml":"https://content.openalex.org/works/W3122144106.grobid-xml"},"referenced_works_count":46,"referenced_works":["https://openalex.org/W1498436455","https://openalex.org/W1614497417","https://openalex.org/W1686810756","https://openalex.org/W1849277567","https://openalex.org/W1999085092","https://openalex.org/W1999890536","https://openalex.org/W2094756095","https://openalex.org/W2097117768","https://openalex.org/W2099471712","https://openalex.org/W2112796928","https://openalex.org/W2117539524","https://openalex.org/W2125203716","https://openalex.org/W2136922672","https://openalex.org/W2156387975","https://openalex.org/W2163605009","https://openalex.org/W2276486856","https://openalex.org/W2279098554","https://openalex.org/W2289252105","https://openalex.org/W2294282016","https://openalex.org/W2525740295","https://openalex.org/W2557257847","https://openalex.org/W2560023338","https://openalex.org/W2562773490","https://openalex.org/W2563587242","https://openalex.org/W2595614461","https://openalex.org/W2612445135","https://openalex.org/W2896983500","https://openalex.org/W2907463061","https://openalex.org/W2946355854","https://openalex.org/W2955425717","https://openalex.org/W2962835968","https://openalex.org/W2963037989","https://openalex.org/W2989331028","https://openalex.org/W3090896767","https://openalex.org/W4242577057","https://openalex.org/W4247198796","https://openalex.org/W4297775537","https://openalex.org/W4320013936","https://openalex.org/W6628973269","https://openalex.org/W6637373629","https://openalex.org/W6639204139","https://openalex.org/W6650357951","https://openalex.org/W6682889407","https://openalex.org/W6684191040","https://openalex.org/W6727759651","https://openalex.org/W6762718338"],"related_works":["https://openalex.org/W2544043553","https://openalex.org/W2546284597","https://openalex.org/W2348562861","https://openalex.org/W2170552397","https://openalex.org/W2540393334","https://openalex.org/W2390042878","https://openalex.org/W2062932566","https://openalex.org/W2085828379","https://openalex.org/W2271847574","https://openalex.org/W2017144313"],"abstract_inverted_index":{"Convolutional":[0],"Neural":[1],"Networks":[2],"(CNN)":[3],"are":[4,24],"widely":[5],"employed":[6],"in":[7,300],"the":[8,21,52,55,59,63,69,90,93,99,106,111,117,124,127,139,143,148,154,202,242,259,278,296],"contemporary":[9],"artificial":[10],"intelligence":[11],"systems.":[12],"However":[13],"these":[14,32,86],"models":[15,33],"have":[16],"millions":[17],"of":[18,92,98,129,158,170,174,251,265,295,310,318,325],"connections":[19],"between":[20,62],"layers,":[22],"that":[23],"both":[25],"memory":[26],"prohibitive":[27],"and":[28,46,65,76,121,131,160,186,194,212,232,321],"computationally":[29],"expensive.":[30],"Employing":[31],"on":[34,126,138,254],"an":[35,171],"embedded":[36],"mobile":[37],"application":[38],"is":[39,68,151,282],"resource":[40,213],"limited":[41],"with":[42,153,241,313,322],"high":[43,74],"power":[44,210,280,316],"consumption":[45,281,317],"significant":[47],"bandwidth":[48],"requirement":[49],"to":[50,72,200,271,288,305],"access":[51],"data":[53,60],"from":[54],"off-chip":[56,66],"DRAM.":[57],"Reducing":[58],"movement":[61],"on-chip":[64],"DRAM":[67],"main":[70],"criteria":[71],"achieve":[73,306],"throughput":[75,268,309],"overall":[77,263,279,308],"better":[78],"energy":[79],"efficiency.":[80],"Our":[81],"proposed":[82,205],"multi-bit":[83],"accelerator":[84,297],"achieves":[85,248],"goals":[87],"by":[88,113,217],"employing":[89],"truncation":[91,206],"partial":[94],"sum":[95],"(Psum)":[96],"results":[97],"preceding":[100],"layer":[101],"before":[102],"feeding":[103],"it":[104],"into":[105],"next":[107],"layer.":[108],"We":[109],"exhibit":[110],"architecture":[112],"inferencing":[114],"32-bits":[115],"for":[116,219,224,228,234],"first":[118],"convolution":[119],"layers":[120],"sequentially":[122],"truncate":[123],"bits":[125,244],"MSB/LSB":[128],"integer":[130],"fractional":[132],"part":[133],"without":[134],"any":[135],"further":[136],"training":[137],"original":[140],"network.":[141],"At":[142],"last":[144],"fully":[145],"connected":[146],"layer,":[147],"top-1":[149],"accuracy":[150,162],"maintained":[152],"reduced":[155,216],"bit":[156],"width":[157],"14":[159],"top-5":[161],"upto":[163],"10-bit":[164],"width.":[165],"The":[166,204,246,292],"computation":[167],"engine":[168],"consists":[169],"systolic":[172],"array":[173],"1024":[175],"processing":[176],"elements":[177],"(PE).":[178],"Large":[179],"CNNs":[180],"such":[181],"as":[182,190],"AlexNet,":[183],"MobileNet,":[184],"SqueezeNet":[185],"EfficientNet":[187],"were":[188],"used":[189,199],"benchmark":[191],"CNN":[192],"model":[193],"Virtex":[195,256],"Ultrascale":[196,257],"FPGA":[197,274],"was":[198,215,298],"test":[201],"architecture.":[203,245],"scheme":[207],"has":[208,261],"49%":[209],"reduction":[211],"utilization":[214],"73.25%":[218],"LUTs":[220],"(Look-up":[221],"tables),":[222],"68.76%":[223],"FFs":[225],"(Flip-Flops),":[226],"74.60%":[227],"BRAMs":[229],"(Block":[230],"RAMs)":[231],"79.425%":[233],"Digital":[235],"Signal":[236],"Processors":[237],"(DSPs)":[238],"when":[239,269,286],"compared":[240,270,287],"32":[243],"design":[247,260],"a":[249,255,262,307,314,323],"performance":[250],"223.69":[252],"GOPS":[253],"FPGA,":[258],"gain":[264],"3.63":[266],"\u00d7":[267,284,328],"other":[272,289],"prior":[273,290],"accelerators.":[275],"In":[276],"addition,":[277],"4.5":[283],"lower":[285],"architectures.":[291],"ASIC":[293],"version":[294],"designed":[299],"22nm":[301],"FDSOI":[302],"CMOS":[303],"process":[304],"2.03":[311],"TOPS/W":[312],"total":[315],"791":[319],"mW":[320],"area":[324],"1":[326],"mm":[327],"1.2":[329],"mm.":[330]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":4}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}