{"id":"https://openalex.org/W3006464937","doi":"https://doi.org/10.1109/ojcas.2020.2974011","title":"Optimized Periodic \u03a3\u0394 Bitstreams for DC Signal Generation Used in Dynamic Calibration Applications","display_name":"Optimized Periodic \u03a3\u0394 Bitstreams for DC Signal Generation Used in Dynamic Calibration Applications","publication_year":2020,"publication_date":"2020-01-01","ids":{"openalex":"https://openalex.org/W3006464937","doi":"https://doi.org/10.1109/ojcas.2020.2974011","mag":"3006464937"},"language":"en","primary_location":{"id":"doi:10.1109/ojcas.2020.2974011","is_oa":true,"landing_page_url":"https://doi.org/10.1109/ojcas.2020.2974011","pdf_url":"https://ieeexplore.ieee.org/ielx7/8784029/8816702/08999501.pdf","source":{"id":"https://openalex.org/S4210192473","display_name":"IEEE Open Journal of Circuits and Systems","issn_l":"2644-1225","issn":["2644-1225"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Open Journal of Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://ieeexplore.ieee.org/ielx7/8784029/8816702/08999501.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5034596339","display_name":"Ahmed S. Emara","orcid":"https://orcid.org/0000-0002-7329-7795"},"institutions":[{"id":"https://openalex.org/I5023651","display_name":"McGill University","ror":"https://ror.org/01pxwe438","country_code":"CA","type":"education","lineage":["https://openalex.org/I5023651"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Ahmed S. Emara","raw_affiliation_strings":["Department of Electrical and Computer Engineering, McGill University, Montreal, Canada"],"raw_orcid":"https://orcid.org/0000-0002-7329-7795","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, McGill University, Montreal, Canada","institution_ids":["https://openalex.org/I5023651"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070083395","display_name":"Denis Romanov","orcid":"https://orcid.org/0000-0002-6871-6553"},"institutions":[{"id":"https://openalex.org/I5023651","display_name":"McGill University","ror":"https://ror.org/01pxwe438","country_code":"CA","type":"education","lineage":["https://openalex.org/I5023651"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Denis Romanov","raw_affiliation_strings":["Department of Electrical and Computer Engineering, McGill University, Montreal, Canada"],"raw_orcid":"https://orcid.org/0000-0002-6871-6553","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, McGill University, Montreal, Canada","institution_ids":["https://openalex.org/I5023651"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083312864","display_name":"Gordon W. Roberts","orcid":"https://orcid.org/0000-0002-4880-0272"},"institutions":[{"id":"https://openalex.org/I5023651","display_name":"McGill University","ror":"https://ror.org/01pxwe438","country_code":"CA","type":"education","lineage":["https://openalex.org/I5023651"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Gordon W. Roberts","raw_affiliation_strings":["Department of Electrical and Computer Engineering, McGill University, Montreal, Canada"],"raw_orcid":"https://orcid.org/0000-0002-4880-0272","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, McGill University, Montreal, Canada","institution_ids":["https://openalex.org/I5023651"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000822442","display_name":"Sadok Aouini","orcid":"https://orcid.org/0000-0002-6303-705X"},"institutions":[{"id":"https://openalex.org/I4210160469","display_name":"Ciena (Canada)","ror":"https://ror.org/05agqdk49","country_code":"CA","type":"company","lineage":["https://openalex.org/I1295297804","https://openalex.org/I4210160469"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Sadok Aouini","raw_affiliation_strings":["Department of Analog Design, Ciena Corporation, Ottawa, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Analog Design, Ciena Corporation, Ottawa, Canada","institution_ids":["https://openalex.org/I4210160469"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049011969","display_name":"Mahdi Parvizi","orcid":"https://orcid.org/0000-0003-4848-9469"},"institutions":[{"id":"https://openalex.org/I4210160469","display_name":"Ciena (Canada)","ror":"https://ror.org/05agqdk49","country_code":"CA","type":"company","lineage":["https://openalex.org/I1295297804","https://openalex.org/I4210160469"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Mahdi Parvizi","raw_affiliation_strings":["Department of Analog Design, Ciena Corporation, Ottawa, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Analog Design, Ciena Corporation, Ottawa, Canada","institution_ids":["https://openalex.org/I4210160469"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5026434083","display_name":"Naim Ben\u2010Hamida","orcid":"https://orcid.org/0000-0002-4031-2725"},"institutions":[{"id":"https://openalex.org/I4210160469","display_name":"Ciena (Canada)","ror":"https://ror.org/05agqdk49","country_code":"CA","type":"company","lineage":["https://openalex.org/I1295297804","https://openalex.org/I4210160469"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Naim Ben-Hamida","raw_affiliation_strings":["Department of Analog Design, Ciena Corporation, Ottawa, Canada"],"raw_orcid":"https://orcid.org/0000-0002-4031-2725","affiliations":[{"raw_affiliation_string":"Department of Analog Design, Ciena Corporation, Ottawa, Canada","institution_ids":["https://openalex.org/I4210160469"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":1750,"currency":"USD","value_usd":1750},"apc_paid":{"value":1750,"currency":"USD","value_usd":1750},"fwci":0.3414,"has_fulltext":true,"cited_by_count":7,"citation_normalized_percentile":{"value":0.52893625,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"1","issue":null,"first_page":"3","last_page":"12"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6891323328018188},{"id":"https://openalex.org/keywords/settling-time","display_name":"Settling time","score":0.6515863537788391},{"id":"https://openalex.org/keywords/bitstream","display_name":"Bitstream","score":0.6274716258049011},{"id":"https://openalex.org/keywords/delta-sigma-modulation","display_name":"Delta-sigma modulation","score":0.57569819688797},{"id":"https://openalex.org/keywords/metric","display_name":"Metric (unit)","score":0.5569345355033875},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.5473494529724121},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.5267578959465027},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.48305732011795044},{"id":"https://openalex.org/keywords/calibration","display_name":"Calibration","score":0.48292776942253113},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.45969170331954956},{"id":"https://openalex.org/keywords/digital-to-analog-converter","display_name":"Digital-to-analog converter","score":0.45624178647994995},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.4356961250305176},{"id":"https://openalex.org/keywords/circuit-complexity","display_name":"Circuit complexity","score":0.41878652572631836},{"id":"https://openalex.org/keywords/resistor","display_name":"Resistor","score":0.41155749559402466},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3954882323741913},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.31390637159347534},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.2821320593357086},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16214188933372498},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.1562887728214264},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.13096845149993896},{"id":"https://openalex.org/keywords/step-response","display_name":"Step response","score":0.12964636087417603},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12337779998779297},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.10489785671234131},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.09987857937812805}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6891323328018188},{"id":"https://openalex.org/C14781684","wikidata":"https://www.wikidata.org/wiki/Q3983320","display_name":"Settling time","level":3,"score":0.6515863537788391},{"id":"https://openalex.org/C136695289","wikidata":"https://www.wikidata.org/wiki/Q415568","display_name":"Bitstream","level":3,"score":0.6274716258049011},{"id":"https://openalex.org/C68754193","wikidata":"https://www.wikidata.org/wiki/Q1184820","display_name":"Delta-sigma modulation","level":3,"score":0.57569819688797},{"id":"https://openalex.org/C176217482","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Metric (unit)","level":2,"score":0.5569345355033875},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.5473494529724121},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.5267578959465027},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.48305732011795044},{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.48292776942253113},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.45969170331954956},{"id":"https://openalex.org/C2779879419","wikidata":"https://www.wikidata.org/wiki/Q210863","display_name":"Digital-to-analog converter","level":3,"score":0.45624178647994995},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.4356961250305176},{"id":"https://openalex.org/C90702460","wikidata":"https://www.wikidata.org/wiki/Q1055112","display_name":"Circuit complexity","level":3,"score":0.41878652572631836},{"id":"https://openalex.org/C137488568","wikidata":"https://www.wikidata.org/wiki/Q5321","display_name":"Resistor","level":3,"score":0.41155749559402466},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3954882323741913},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.31390637159347534},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.2821320593357086},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16214188933372498},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.1562887728214264},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.13096845149993896},{"id":"https://openalex.org/C160030872","wikidata":"https://www.wikidata.org/wiki/Q2142864","display_name":"Step response","level":2,"score":0.12964636087417603},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12337779998779297},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.10489785671234131},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.09987857937812805},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C133731056","wikidata":"https://www.wikidata.org/wiki/Q4917288","display_name":"Control engineering","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/ojcas.2020.2974011","is_oa":true,"landing_page_url":"https://doi.org/10.1109/ojcas.2020.2974011","pdf_url":"https://ieeexplore.ieee.org/ielx7/8784029/8816702/08999501.pdf","source":{"id":"https://openalex.org/S4210192473","display_name":"IEEE Open Journal of Circuits and Systems","issn_l":"2644-1225","issn":["2644-1225"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Open Journal of Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:867c1f32d7b84cd3bb84b4bf01a07d20","is_oa":true,"landing_page_url":"https://doaj.org/article/867c1f32d7b84cd3bb84b4bf01a07d20","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-sa","license_id":"https://openalex.org/licenses/cc-by-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Open Journal of Circuits and Systems, Vol 1, Pp 3-12 (2020)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1109/ojcas.2020.2974011","is_oa":true,"landing_page_url":"https://doi.org/10.1109/ojcas.2020.2974011","pdf_url":"https://ieeexplore.ieee.org/ielx7/8784029/8816702/08999501.pdf","source":{"id":"https://openalex.org/S4210192473","display_name":"IEEE Open Journal of Circuits and Systems","issn_l":"2644-1225","issn":["2644-1225"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Open Journal of Circuits and Systems","raw_type":"journal-article"},"sustainable_development_goals":[{"score":0.4699999988079071,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320322675","display_name":"Mitacs","ror":"https://ror.org/00cjrc276"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W3006464937.pdf","grobid_xml":"https://content.openalex.org/works/W3006464937.grobid-xml"},"referenced_works_count":8,"referenced_works":["https://openalex.org/W1761467716","https://openalex.org/W2048407380","https://openalex.org/W2135919709","https://openalex.org/W2159029162","https://openalex.org/W2982613138","https://openalex.org/W3203011645","https://openalex.org/W6680208879","https://openalex.org/W6990159360"],"related_works":["https://openalex.org/W163454735","https://openalex.org/W2375446025","https://openalex.org/W1950910079","https://openalex.org/W1992247475","https://openalex.org/W1517075559","https://openalex.org/W4245204692","https://openalex.org/W2805408360","https://openalex.org/W249384923","https://openalex.org/W2093334609","https://openalex.org/W2398420255"],"abstract_inverted_index":{"Settling":[0],"time":[1,119],"is":[2,72,91],"an":[3,20],"important":[4],"performance":[5,120],"metric":[6],"in":[7,38,57,117,126],"digital-to-analog":[8],"converters":[9],"(DACs)":[10],"that":[11,63,68,106],"are":[12,27,79],"used":[13,125],"for":[14,98,143,148,155],"dynamic":[15],"calibration":[16],"applications.":[17],"To":[18],"obtain":[19],"area":[21,74,137],"efficient":[22],"DAC":[23],"design,":[24],"periodic":[25],"sequences":[26],"generated":[28,56],"from":[29],"sigma-delta":[30,53],"modulators":[31],"(\u03a3\u0394Ms)":[32],"using":[33,107],"software,":[34],"stores":[35],"the":[36,52,95,108,127],"sequence":[37],"memory":[39],"and":[40,71,84,146],"then":[41],"passes":[42],"it":[43,64,134],"to":[44,93,157],"a":[45,66,122,130],"low-pass":[46],"filter":[47],"(LPF).":[48],"In":[49],"this":[50],"brief,":[51],"(\u03a3\u0394)":[54],"bitstream":[55],"software":[58],"will":[59,103],"be":[60,104],"optimized":[61],"such":[62],"yields":[65],"system":[67],"settles":[69],"faster":[70],"more":[73],"efficient.":[75],"Two":[76],"optimization":[77],"routines":[78],"used,":[80],"namely,":[81],"serial":[82],"method":[83,86,90,110],"random":[85,89,109],"algorithms.":[87],"The":[88],"chosen":[92],"optimize":[94],"\u03a3\u0394":[96],"bitstreams":[97],"its":[99],"computational":[100],"simplicity.":[101],"It":[102],"shown,":[105],"routine":[111],"provides":[112],"at":[113,140],"least":[114,141],"46%":[115],"improvement":[116],"settling":[118],"of":[121,160],"12-bit":[123],"DAC,":[124],"paper":[128],"as":[129],"design":[131],"example.":[132],"Moreover,":[133],"offers":[135],"silicon":[136],"savings":[138],"by":[139],"10%":[142],"resistor":[144],"components":[145],"35%":[147],"capacitor":[149],"components.":[150],"Similar":[151],"results":[152],"were":[153],"obtained":[154],"8":[156],"11":[158],"bits":[159],"resolution.":[161]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
