{"id":"https://openalex.org/W2218086155","doi":"https://doi.org/10.1109/norchip.2015.7364357","title":"A BW-tracking semi-digital PLL with near-optimal VCO phase noise shaping in low-cost 0.4 \u00b5m CMOS achieving 700 fs rms phase jitter","display_name":"A BW-tracking semi-digital PLL with near-optimal VCO phase noise shaping in low-cost 0.4 \u00b5m CMOS achieving 700 fs rms phase jitter","publication_year":2015,"publication_date":"2015-10-01","ids":{"openalex":"https://openalex.org/W2218086155","doi":"https://doi.org/10.1109/norchip.2015.7364357","mag":"2218086155"},"language":"en","primary_location":{"id":"doi:10.1109/norchip.2015.7364357","is_oa":true,"landing_page_url":"https://doi.org/10.1109/norchip.2015.7364357","pdf_url":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7364357","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7364357","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006527342","display_name":"S. Fahmy","orcid":null},"institutions":[{"id":"https://openalex.org/I4210129496","display_name":"Texas Instruments (Germany)","ror":"https://ror.org/03cvjvq49","country_code":"DE","type":"company","lineage":["https://openalex.org/I4210129496","https://openalex.org/I74760111"]},{"id":"https://openalex.org/I196349391","display_name":"Universit\u00e4t Ulm","ror":"https://ror.org/032000t02","country_code":"DE","type":"education","lineage":["https://openalex.org/I196349391"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"S. Fahmy","raw_affiliation_strings":["Institute of Microelectronics, University of Ulm, Ulm, Germany","Texas Instruments, Freising, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, University of Ulm, Ulm, Germany","institution_ids":["https://openalex.org/I196349391"]},{"raw_affiliation_string":"Texas Instruments, Freising, Germany","institution_ids":["https://openalex.org/I4210129496"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110420187","display_name":"Markus Dietl","orcid":null},"institutions":[{"id":"https://openalex.org/I4210129496","display_name":"Texas Instruments (Germany)","ror":"https://ror.org/03cvjvq49","country_code":"DE","type":"company","lineage":["https://openalex.org/I4210129496","https://openalex.org/I74760111"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"M. Dietl","raw_affiliation_strings":["Texas Instruments, Freising, Germany"],"affiliations":[{"raw_affiliation_string":"Texas Instruments, Freising, Germany","institution_ids":["https://openalex.org/I4210129496"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067257171","display_name":"Puneet Sareen","orcid":null},"institutions":[{"id":"https://openalex.org/I4210129496","display_name":"Texas Instruments (Germany)","ror":"https://ror.org/03cvjvq49","country_code":"DE","type":"company","lineage":["https://openalex.org/I4210129496","https://openalex.org/I74760111"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"P. Sareen","raw_affiliation_strings":["Texas Instruments, Freising, Germany"],"affiliations":[{"raw_affiliation_string":"Texas Instruments, Freising, Germany","institution_ids":["https://openalex.org/I4210129496"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034938079","display_name":"Maurits Ortmanns","orcid":"https://orcid.org/0000-0002-3547-1596"},"institutions":[{"id":"https://openalex.org/I196349391","display_name":"Universit\u00e4t Ulm","ror":"https://ror.org/032000t02","country_code":"DE","type":"education","lineage":["https://openalex.org/I196349391"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"M. Ortmanns","raw_affiliation_strings":["Institute of Microelectronics, University of Ulm, Ulm, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, University of Ulm, Ulm, Germany","institution_ids":["https://openalex.org/I196349391"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052708751","display_name":"Jens Anders","orcid":"https://orcid.org/0000-0002-2498-0352"},"institutions":[{"id":"https://openalex.org/I196349391","display_name":"Universit\u00e4t Ulm","ror":"https://ror.org/032000t02","country_code":"DE","type":"education","lineage":["https://openalex.org/I196349391"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"J. Anders","raw_affiliation_strings":["Institute of Microelectronics, University of Ulm, Ulm, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, University of Ulm, Ulm, Germany","institution_ids":["https://openalex.org/I196349391"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5006527342"],"corresponding_institution_ids":["https://openalex.org/I196349391","https://openalex.org/I4210129496"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.0980587,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9962000250816345,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9944000244140625,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8797764182090759},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.8651865720748901},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.8151743412017822},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.7332285642623901},{"id":"https://openalex.org/keywords/pll-multibit","display_name":"PLL multibit","score":0.6600300669670105},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6496630311012268},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.6341156959533691},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.520021915435791},{"id":"https://openalex.org/keywords/phase-frequency-detector","display_name":"Phase frequency detector","score":0.4550905227661133},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.45009949803352356},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.34685492515563965},{"id":"https://openalex.org/keywords/charge-pump","display_name":"Charge pump","score":0.2747063934803009},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.27408602833747864},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.17003479599952698},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11928072571754456}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8797764182090759},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.8651865720748901},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.8151743412017822},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.7332285642623901},{"id":"https://openalex.org/C77881186","wikidata":"https://www.wikidata.org/wiki/Q7119642","display_name":"PLL multibit","level":4,"score":0.6600300669670105},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6496630311012268},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.6341156959533691},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.520021915435791},{"id":"https://openalex.org/C2776158855","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase frequency detector","level":5,"score":0.4550905227661133},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.45009949803352356},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.34685492515563965},{"id":"https://openalex.org/C114825011","wikidata":"https://www.wikidata.org/wiki/Q440704","display_name":"Charge pump","level":4,"score":0.2747063934803009},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.27408602833747864},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.17003479599952698},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11928072571754456},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/norchip.2015.7364357","is_oa":true,"landing_page_url":"https://doi.org/10.1109/norchip.2015.7364357","pdf_url":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7364357","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC)","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1109/norchip.2015.7364357","is_oa":true,"landing_page_url":"https://doi.org/10.1109/norchip.2015.7364357","pdf_url":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7364357","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC)","raw_type":"proceedings-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2218086155.pdf","grobid_xml":"https://content.openalex.org/works/W2218086155.grobid-xml"},"referenced_works_count":4,"referenced_works":["https://openalex.org/W1967823490","https://openalex.org/W2006427734","https://openalex.org/W2027263631","https://openalex.org/W2114770395"],"related_works":["https://openalex.org/W1486070987","https://openalex.org/W2217043549","https://openalex.org/W2976219355","https://openalex.org/W4385624389","https://openalex.org/W2054263477","https://openalex.org/W4381745543","https://openalex.org/W2115565809","https://openalex.org/W3217616230","https://openalex.org/W2369807905","https://openalex.org/W1600405202"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,51,111,117,122,133],"low-power":[4],"BW-tracking":[5],"semi-digital":[6],"PLL.":[7],"The":[8,18,43],"design":[9,75],"features":[10,73],"independently":[11],"adjustable":[12],"proportional":[13],"and":[14,36,77,81],"integral":[15],"controller":[16],"paths.":[17],"digital":[19,90],"information":[20],"provided":[21],"by":[22],"the":[23,27,33,40,48,55,70,92,103,114,144],"storage":[24],"cells":[25],"in":[26,47,54,121,146],"I-path":[28],"are":[29],"used":[30],"to":[31,64,89],"let":[32],"PLL":[34,118],"bandwidth":[35],"phase":[37,99],"margin":[38],"track":[39],"VCO":[41],"frequency.":[42],"proposed":[44,71,93,115],"switching":[45],"scheme":[46],"P-path":[49],"provides":[50],"quiet":[52],"output":[53],"locked":[56],"state":[57],"significantly":[58],"reducing":[59],"update":[60],"jitter.":[61],"In":[62,87],"contrast":[63,88],"classical":[65],"analog":[66],"charge":[67],"pump":[68],"PLLs,":[69,91],"concept":[72],"low":[74,123],"complexity":[76],"small":[78],"area":[79],"requirements":[80],"does":[82],"not":[83],"require":[84],"external":[85],"components.":[86],"architecture":[94],"allows":[95],"for":[96,105],"an":[97],"excellent":[98],"noise":[100],"performance":[101],"without":[102],"need":[104],"highly":[106],"scaled":[107],"CMOS":[108,127,149],"technologies.":[109,150],"As":[110],"proof-of-concept":[112],"of":[113,138],"architecture,":[116],"prototype":[119],"realized":[120],"cost":[124],"0.4":[125],"\u03bcm":[126],"technology":[128],"is":[129],"presented,":[130],"which":[131],"achieves":[132],"measured":[134],"integrated":[135],"rms":[136],"jitter":[137],"only":[139],"700":[140],"fs":[141],"competing":[142],"with":[143],"state-of-the-art":[145],"deep":[147],"submicron":[148]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}