{"id":"https://openalex.org/W4251219996","doi":"https://doi.org/10.1109/nocs.2018.8512159","title":"DAPPER: Data Aware Approximate NoC for GPGPU Architectures","display_name":"DAPPER: Data Aware Approximate NoC for GPGPU Architectures","publication_year":2018,"publication_date":"2018-10-01","ids":{"openalex":"https://openalex.org/W4251219996","doi":"https://doi.org/10.1109/nocs.2018.8512159"},"language":"en","primary_location":{"id":"doi:10.1109/nocs.2018.8512159","is_oa":false,"landing_page_url":"https://doi.org/10.1109/nocs.2018.8512159","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 Twelfth IEEE/ACM International Symposium on Networks-on-Chip (NOCS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5014215787","display_name":"Venkata Yaswanth Raparti","orcid":"https://orcid.org/0000-0001-8763-4118"},"institutions":[{"id":"https://openalex.org/I92446798","display_name":"Colorado State University","ror":"https://ror.org/03k1gpj17","country_code":"US","type":"education","lineage":["https://openalex.org/I92446798"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Venkata Yaswanth Raparti","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Colorado State University, Fort Collins, CO, U.S.A"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Colorado State University, Fort Collins, CO, U.S.A","institution_ids":["https://openalex.org/I92446798"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5018382547","display_name":"Sudeep Pasricha","orcid":"https://orcid.org/0000-0002-0846-0066"},"institutions":[{"id":"https://openalex.org/I92446798","display_name":"Colorado State University","ror":"https://ror.org/03k1gpj17","country_code":"US","type":"education","lineage":["https://openalex.org/I92446798"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sudeep Pasricha","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Colorado State University, Fort Collins, CO, U.S.A"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Colorado State University, Fort Collins, CO, U.S.A","institution_ids":["https://openalex.org/I92446798"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5014215787"],"corresponding_institution_ids":["https://openalex.org/I92446798"],"apc_list":null,"apc_paid":null,"fwci":3.1371,"has_fulltext":false,"cited_by_count":23,"citation_normalized_percentile":{"value":0.9268491,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8612027168273926},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.6724146604537964},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.6050809621810913},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5788773894309998},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.5744637846946716},{"id":"https://openalex.org/keywords/network-packet","display_name":"Network packet","score":0.5504851341247559},{"id":"https://openalex.org/keywords/general-purpose-computing-on-graphics-processing-units","display_name":"General-purpose computing on graphics processing units","score":0.5441348552703857},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.4952913820743561},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.49001017212867737},{"id":"https://openalex.org/keywords/shader","display_name":"Shader","score":0.48031705617904663},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.45120465755462646},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.44702577590942383},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.43447911739349365},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.4340102970600128},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.43229180574417114},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.42820560932159424},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.23745036125183105},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.18289366364479065},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.142714262008667},{"id":"https://openalex.org/keywords/graphics","display_name":"Graphics","score":0.10450524091720581}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8612027168273926},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.6724146604537964},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.6050809621810913},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5788773894309998},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.5744637846946716},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.5504851341247559},{"id":"https://openalex.org/C50630238","wikidata":"https://www.wikidata.org/wiki/Q971505","display_name":"General-purpose computing on graphics processing units","level":3,"score":0.5441348552703857},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.4952913820743561},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.49001017212867737},{"id":"https://openalex.org/C177681979","wikidata":"https://www.wikidata.org/wiki/Q633182","display_name":"Shader","level":3,"score":0.48031705617904663},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.45120465755462646},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.44702577590942383},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.43447911739349365},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4340102970600128},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.43229180574417114},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.42820560932159424},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.23745036125183105},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.18289366364479065},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.142714262008667},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.10450524091720581}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/nocs.2018.8512159","is_oa":false,"landing_page_url":"https://doi.org/10.1109/nocs.2018.8512159","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 Twelfth IEEE/ACM International Symposium on Networks-on-Chip (NOCS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W1505822854","https://openalex.org/W1971421905","https://openalex.org/W1979527452","https://openalex.org/W1984222112","https://openalex.org/W1985818188","https://openalex.org/W2030922317","https://openalex.org/W2035378788","https://openalex.org/W2066985990","https://openalex.org/W2072122809","https://openalex.org/W2131566532","https://openalex.org/W2132985883","https://openalex.org/W2152993566","https://openalex.org/W2169275978","https://openalex.org/W2179513480","https://openalex.org/W2187230075","https://openalex.org/W2344788583","https://openalex.org/W2397649144","https://openalex.org/W2601729082","https://openalex.org/W2963565222","https://openalex.org/W3141620748","https://openalex.org/W4234833047","https://openalex.org/W4240237526","https://openalex.org/W4246884733","https://openalex.org/W4248591063","https://openalex.org/W6679459131","https://openalex.org/W6712536490"],"related_works":["https://openalex.org/W4386869637","https://openalex.org/W1807158275","https://openalex.org/W2091793939","https://openalex.org/W2383689235","https://openalex.org/W2181557959","https://openalex.org/W2055881261","https://openalex.org/W2169880332","https://openalex.org/W2141567078","https://openalex.org/W4387251174","https://openalex.org/W4242293745"],"abstract_inverted_index":{"High":[0],"interconnect":[1],"bandwidth":[2,103,125],"is":[3],"crucial":[4],"to":[5,35,40,54,78,190,194,204],"achieve":[6],"better":[7],"performance":[8,201],"in":[9,108,185],"many-core":[10],"GPGPU":[11,187],"architectures":[12,94],"that":[13,73,95,118,150,179],"execute":[14],"highly":[15],"data":[16,45,61,91,157],"parallel":[17,20],"applications.":[18],"The":[19],"warps":[21],"of":[22,32,44,59,90,122,155,159,166],"threads":[23],"running":[24],"on":[25],"shader":[26,50,141],"cores":[27,81],"generate":[28],"a":[29,67,113,146,205],"high":[30,88,97,102],"volume":[31],"read":[33],"requests":[34],"the":[36,41,49,63,79,83,120,123,135,152,156,164,171,174,182,186],"main":[37],"memory":[38,70],"due":[39],"limited":[42],"availability":[43],"cache":[46],"space":[47],"at":[48,69],"cores.":[51,142],"This":[52],"leads":[53],"scenarios":[55],"with":[56,86,192],"rapid":[57],"arrival":[58],"reply":[60,75,136,167],"from":[62],"DRAM,":[64],"which":[65],"creates":[66],"bottleneck":[68],"controllers":[71],"(MCs)":[72],"send":[74],"packets":[76,168],"back":[77],"requesting":[80],"over":[82],"NoC.":[84],"Coping":[85],"such":[87],"volumes":[89],"requires":[92],"NoC":[93,116,172,208],"possess":[96],"power":[98,129],"overhead.":[99],"To":[100],"accomplish":[101],"and":[104,140,162,199],"low":[105,128],"energy":[106,183],"communication":[107],"GPGPUs,":[109],"we":[110],"propose":[111],"Dapper,":[112],"data-aware":[114],"approximate":[115,207],"architecture":[117,149],"increases":[119],"utilization":[121],"available":[124],"by":[126,173,188],"using":[127],"single":[130],"cycle":[131],"overlay":[132],"circuits":[133],"for":[134],"traffic":[137],"between":[138],"MCs":[139],"Dapper":[143,180],"also":[144],"incorporates":[145],"novel":[147],"MC":[148],"leverages":[151],"inherent":[153],"approximability":[154],"values":[158],"certain":[160],"applications":[161],"reduces":[163,181],"number":[165],"injected":[169],"into":[170],"MCs.":[175],"Experimental":[176],"results":[177],"show":[178],"consumed":[184],"up":[189,193],"50%":[191],"99%":[195],"application":[196],"output":[197],"accuracy":[198],"minimum":[200],"overheads":[202],"compared":[203],"state-of-the-art":[206],"architectures.":[209]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":6},{"year":2020,"cited_by_count":8},{"year":2019,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}