{"id":"https://openalex.org/W2151651326","doi":"https://doi.org/10.1109/nocs.2009.5071470","title":"A GALS many-core heterogeneous DSP platform with source-synchronous on-chip interconnection network","display_name":"A GALS many-core heterogeneous DSP platform with source-synchronous on-chip interconnection network","publication_year":2009,"publication_date":"2009-01-01","ids":{"openalex":"https://openalex.org/W2151651326","doi":"https://doi.org/10.1109/nocs.2009.5071470","mag":"2151651326"},"language":"en","primary_location":{"id":"doi:10.1109/nocs.2009.5071470","is_oa":false,"landing_page_url":"https://doi.org/10.1109/nocs.2009.5071470","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 3rd ACM/IEEE International Symposium on Networks-on-Chip","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060594077","display_name":"Anh Tran","orcid":null},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California, San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Anh T. Tran","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of California, San Diego, Davis, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of California, San Diego, Davis, USA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111922010","display_name":"Dean N. Truong","orcid":null},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California, San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dean N. Truong","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of California, San Diego, Davis, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of California, San Diego, Davis, USA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5058921665","display_name":"Bevan Baas","orcid":null},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California, San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bevan M. Baas","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of California, San Diego, Davis, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of California, San Diego, Davis, USA","institution_ids":["https://openalex.org/I36258959"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5060594077"],"corresponding_institution_ids":["https://openalex.org/I36258959"],"apc_list":null,"apc_paid":null,"fwci":3.7713,"has_fulltext":false,"cited_by_count":17,"citation_normalized_percentile":{"value":0.93860953,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":95,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"214","last_page":"223"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7045339345932007},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.642815351486206},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6046857237815857},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.5146363973617554},{"id":"https://openalex.org/keywords/baseband","display_name":"Baseband","score":0.5091609358787537},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5084139704704285},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.4709782600402832},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.4683470129966736},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4473527669906616},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.37303322553634644},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.24234062433242798},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.23471981287002563},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.15087074041366577},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.14778050780296326},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14727097749710083},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.09871560335159302},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09512224793434143}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7045339345932007},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.642815351486206},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6046857237815857},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.5146363973617554},{"id":"https://openalex.org/C65165936","wikidata":"https://www.wikidata.org/wiki/Q575784","display_name":"Baseband","level":3,"score":0.5091609358787537},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5084139704704285},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4709782600402832},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.4683470129966736},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4473527669906616},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.37303322553634644},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.24234062433242798},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.23471981287002563},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.15087074041366577},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.14778050780296326},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14727097749710083},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.09871560335159302},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09512224793434143}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/nocs.2009.5071470","is_oa":false,"landing_page_url":"https://doi.org/10.1109/nocs.2009.5071470","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 3rd ACM/IEEE International Symposium on Networks-on-Chip","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.7900000214576721,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":39,"referenced_works":["https://openalex.org/W1538592187","https://openalex.org/W1555915743","https://openalex.org/W1633471522","https://openalex.org/W1972801036","https://openalex.org/W2011900848","https://openalex.org/W2017503457","https://openalex.org/W2022038016","https://openalex.org/W2031235329","https://openalex.org/W2035720033","https://openalex.org/W2049962309","https://openalex.org/W2056620549","https://openalex.org/W2069940478","https://openalex.org/W2081379617","https://openalex.org/W2095644119","https://openalex.org/W2097560795","https://openalex.org/W2099399959","https://openalex.org/W2104610013","https://openalex.org/W2105963793","https://openalex.org/W2112292992","https://openalex.org/W2114522727","https://openalex.org/W2116175063","https://openalex.org/W2121865749","https://openalex.org/W2126647846","https://openalex.org/W2127495914","https://openalex.org/W2131783928","https://openalex.org/W2133916137","https://openalex.org/W2143626656","https://openalex.org/W2152385473","https://openalex.org/W2165967421","https://openalex.org/W2166243422","https://openalex.org/W2172212694","https://openalex.org/W3112867862","https://openalex.org/W3140261852","https://openalex.org/W4240575514","https://openalex.org/W6654834059","https://openalex.org/W6674569009","https://openalex.org/W6676892943","https://openalex.org/W6677377052","https://openalex.org/W6677763808"],"related_works":["https://openalex.org/W2204547643","https://openalex.org/W1497578837","https://openalex.org/W4293208944","https://openalex.org/W4294892273","https://openalex.org/W2355697382","https://openalex.org/W2157434987","https://openalex.org/W2622425222","https://openalex.org/W2546635662","https://openalex.org/W2765822612","https://openalex.org/W2154351074"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,10,26,72,90,112,163,187],"many-core":[4],"heterogeneous":[5],"computational":[6,33],"platform":[7,17],"that":[8,24,79],"employs":[9],"GALS":[11,152],"compatible":[12],"circuit-switched":[13],"on-chip":[14],"network.":[15],"The":[16,35],"targets":[18],"streaming":[19],"DSP":[20],"and":[21,53,67,125,128,154,178,221],"embedded":[22],"applications":[23],"have":[25],"high":[27],"degree":[28],"of":[29,44,93,115,150,194,206],"task-level":[30],"parallelism":[31],"among":[32],"kernels.":[34],"test":[36],"chip":[37,201],"was":[38,105],"fabricated":[39],"in":[40,189],"65nm":[41],"CMOS":[42],"consisting":[43],"164":[45],"simple":[46,73],"small":[47],"programmable":[48],"cores,":[49],"three":[50,54],"dedicated-purpose":[51],"accelerators":[52],"shared":[55],"memory":[56],"modules.":[57],"All":[58],"processors":[59,87,120],"are":[60],"clocked":[61],"by":[62,140,155],"their":[63],"own":[64],"local":[65],"oscillators":[66],"communication":[68,77],"is":[69],"achieved":[70],"through":[71],"yet":[74],"effective":[75],"source-synchronous":[76],"technique":[78],"allows":[80],"each":[81,157],"interconnection":[82,142],"link":[83],"between":[84],"any":[85],"two":[86],"to":[88,160,217],"sustain":[89],"peak":[91],"throughput":[92,114],"one":[94],"data":[95],"word":[96],"per":[97],"cycle.":[98],"A":[99],"complete":[100],"802.11a":[101],"WLAN":[102],"baseband":[103],"receiver":[104,182],"implemented":[106],"on":[107,198],"this":[108],"platform.":[109],"It":[110],"has":[111],"real-time":[113],"54":[116],"Mbps":[117],"with":[118,134,168,210],"all":[119],"running":[121],"at":[122,162,175],"594":[123],"MHz":[124],"0.95":[126,176],"V,":[127,180],"consumes":[129,183],"an":[130],"average":[131],"174.76":[132],"mW":[133,136],"12.18":[135],"(or":[137],"7.0%)":[138],"dissipated":[139],"its":[141,195],"links.":[143],"We":[144],"can":[145],"fully":[146],"utilize":[147],"the":[148,151,169,181,199,204,211],"benefit":[149],"architecture":[153],"adjusting":[156],"processor's":[158],"oscillator":[159],"run":[161],"workload-based":[164],"optimal":[165],"clock":[166],"frequency":[167],"chip's":[170],"dual":[171],"supply":[172],"voltages":[173],"set":[174],"V":[177],"0.75":[179],"only":[184,207],"123.18":[185],"mW,":[186],"29.5%":[188],"power":[190,196],"reduction.":[191],"Measured":[192],"results":[193,213],"consumption":[197],"real":[200],"come":[202],"within":[203],"difference":[205],"2-5%":[208],"compared":[209],"estimated":[212],"showing":[214],"our":[215],"design":[216],"be":[218],"highly":[219],"reliable":[220],"efficient.":[222]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":6}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
