{"id":"https://openalex.org/W2123535097","doi":"https://doi.org/10.1109/nocs.2009.5071450","title":"Performance Evaluation of NoC Architectures for Parallel Workloads","display_name":"Performance Evaluation of NoC Architectures for Parallel Workloads","publication_year":2009,"publication_date":"2009-01-01","ids":{"openalex":"https://openalex.org/W2123535097","doi":"https://doi.org/10.1109/nocs.2009.5071450","mag":"2123535097"},"language":"en","primary_location":{"id":"doi:10.1109/nocs.2009.5071450","is_oa":false,"landing_page_url":"https://doi.org/10.1109/nocs.2009.5071450","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 3rd ACM/IEEE International Symposium on Networks-on-Chip","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5079249940","display_name":"Henrique Cota de Freitas","orcid":"https://orcid.org/0000-0001-9722-1093"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]},{"id":"https://openalex.org/I170935008","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica de Minas Gerais","ror":"https://ror.org/03j1rr444","country_code":"BR","type":"education","lineage":["https://openalex.org/I170935008"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"Henrique C. Freitas","raw_affiliation_strings":["Informatics Institute, Universidade Federal do Rio Grande do Sul, Rio Grande do Sul, Brazil","Pontif\u00edcia Universidade Cat\u00f3lica de Minas Gerais, Belo Horizonte, Minas Gerais, Brazil"],"affiliations":[{"raw_affiliation_string":"Informatics Institute, Universidade Federal do Rio Grande do Sul, Rio Grande do Sul, Brazil","institution_ids":["https://openalex.org/I130442723"]},{"raw_affiliation_string":"Pontif\u00edcia Universidade Cat\u00f3lica de Minas Gerais, Belo Horizonte, Minas Gerais, Brazil","institution_ids":["https://openalex.org/I170935008"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086055754","display_name":"Marco A. Z. Alves","orcid":"https://orcid.org/0000-0003-2440-2664"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Marco A. Z. Alves","raw_affiliation_strings":["Informatics Institute, Universidade Federal do Rio Grande do Sul, Rio Grande do Sul, Brazil"],"affiliations":[{"raw_affiliation_string":"Informatics Institute, Universidade Federal do Rio Grande do Sul, Rio Grande do Sul, Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021011013","display_name":"Lucas Mello Schnorr","orcid":"https://orcid.org/0000-0003-4828-9942"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Lucas M. Schnorr","raw_affiliation_strings":["Informatics Institute, Universidade Federal do Rio Grande do Sul, Rio Grande do Sul, Brazil"],"affiliations":[{"raw_affiliation_string":"Informatics Institute, Universidade Federal do Rio Grande do Sul, Rio Grande do Sul, Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5091234084","display_name":"Philippe O. A. Navaux","orcid":"https://orcid.org/0000-0002-9957-5861"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Philippe O. A. Navaux","raw_affiliation_strings":["Informatics Institute, Universidade Federal do Rio Grande do Sul, Rio Grande do Sul, Brazil"],"affiliations":[{"raw_affiliation_string":"Informatics Institute, Universidade Federal do Rio Grande do Sul, Rio Grande do Sul, Brazil","institution_ids":["https://openalex.org/I130442723"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5079249940"],"corresponding_institution_ids":["https://openalex.org/I130442723","https://openalex.org/I170935008"],"apc_list":null,"apc_paid":null,"fwci":1.0285,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.79135695,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"87","last_page":"87"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8555972576141357},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.7089925408363342},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.672173261642456},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6184879541397095},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5224125385284424},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.49415162205696106},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.440273255109787},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4052811563014984},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.17378127574920654}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8555972576141357},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.7089925408363342},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.672173261642456},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6184879541397095},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5224125385284424},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.49415162205696106},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.440273255109787},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4052811563014984},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.17378127574920654},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/nocs.2009.5071450","is_oa":false,"landing_page_url":"https://doi.org/10.1109/nocs.2009.5071450","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 3rd ACM/IEEE International Symposium on Networks-on-Chip","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.49000000953674316,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2102420748","https://openalex.org/W2118912915","https://openalex.org/W2152854240","https://openalex.org/W2163590199","https://openalex.org/W4247438847","https://openalex.org/W4285719527","https://openalex.org/W6675449490","https://openalex.org/W6684204203"],"related_works":["https://openalex.org/W2155019192","https://openalex.org/W2014709025","https://openalex.org/W2038503502","https://openalex.org/W2360310172","https://openalex.org/W4863605","https://openalex.org/W4285287318","https://openalex.org/W2784141701","https://openalex.org/W2138821532","https://openalex.org/W1978899622","https://openalex.org/W1490024093"],"abstract_inverted_index":{"Network-on-Chip":[0],"is":[1,22,42],"the":[2,11,20,36,45],"state-of-the-art":[3],"approach":[4],"to":[5,23,43],"interconnect":[6],"many":[7],"processing":[8],"cores":[9],"in":[10],"next":[12],"generation":[13],"of":[14,28,39,47],"general-purpose":[15],"processors.":[16],"In":[17],"this":[18,40],"context,":[19],"problem":[21],"choose":[24],"NoC":[25,49],"architectures":[26,50],"capable":[27],"achieving":[29],"high":[30],"performance":[31,46],"for":[32],"parallel":[33,53],"programs.":[34],"Therefore,":[35],"main":[37],"goal":[38],"paper":[41],"evaluate":[44],"three":[48],"using":[51],"well-known":[52],"workloads.":[54]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
