{"id":"https://openalex.org/W4412109212","doi":"https://doi.org/10.1109/nice65350.2025.11065866","title":"OctopuScheduler: On-Chip DNN Scheduling on the SpiNNaker2 Neuromorphic MPSoC","display_name":"OctopuScheduler: On-Chip DNN Scheduling on the SpiNNaker2 Neuromorphic MPSoC","publication_year":2025,"publication_date":"2025-03-25","ids":{"openalex":"https://openalex.org/W4412109212","doi":"https://doi.org/10.1109/nice65350.2025.11065866"},"language":"en","primary_location":{"id":"doi:10.1109/nice65350.2025.11065866","is_oa":false,"landing_page_url":"https://doi.org/10.1109/nice65350.2025.11065866","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 Neuro Inspired Computational Elements (NICE)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5050045132","display_name":"Tim Langer","orcid":"https://orcid.org/0000-0002-9278-058X"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Tim Langer","raw_affiliation_strings":["Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics,TU Dresden,Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics,TU Dresden,Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036420094","display_name":"Matthias Jobst","orcid":"https://orcid.org/0000-0003-3147-1625"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Matthias Jobst","raw_affiliation_strings":["Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics,TU Dresden,Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics,TU Dresden,Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100322154","display_name":"Chen Liu","orcid":"https://orcid.org/0000-0002-3288-9516"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Chen Liu","raw_affiliation_strings":["Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics,TU Dresden,Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics,TU Dresden,Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036095997","display_name":"Florian Kelber","orcid":"https://orcid.org/0000-0001-7663-5211"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Florian Kelber","raw_affiliation_strings":["Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics,TU Dresden,Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics,TU Dresden,Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072679919","display_name":"Bernhard Vogginger","orcid":"https://orcid.org/0000-0001-9042-5405"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Bernhard Vogginger","raw_affiliation_strings":["Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics,TU Dresden,Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics,TU Dresden,Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071241846","display_name":"Christian Mayr","orcid":"https://orcid.org/0000-0003-3502-0872"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Christian Mayr","raw_affiliation_strings":["Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics,TU Dresden,Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics,TU Dresden,Germany","institution_ids":["https://openalex.org/I78650965"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I78650965"],"apc_list":null,"apc_paid":null,"fwci":6.9408,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.96309326,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":91,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"10"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.9584209322929382},{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.9112385511398315},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6357866525650024},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5187761783599854},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4951101839542389},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.48488861322402954},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.48226433992385864},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.46231895685195923},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.19535109400749207},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1147409975528717},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.0859234631061554},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07666438817977905}],"concepts":[{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.9584209322929382},{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.9112385511398315},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6357866525650024},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5187761783599854},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4951101839542389},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.48488861322402954},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.48226433992385864},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.46231895685195923},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.19535109400749207},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1147409975528717},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0859234631061554},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07666438817977905},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/nice65350.2025.11065866","is_oa":false,"landing_page_url":"https://doi.org/10.1109/nice65350.2025.11065866","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 Neuro Inspired Computational Elements (NICE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320311687","display_name":"Ministry of Education","ror":"https://ror.org/03m01yf64"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":44,"referenced_works":["https://openalex.org/W1583837637","https://openalex.org/W1987034518","https://openalex.org/W2109589838","https://openalex.org/W2138913040","https://openalex.org/W2194775991","https://openalex.org/W2480854438","https://openalex.org/W2565639579","https://openalex.org/W2783525259","https://openalex.org/W2801650015","https://openalex.org/W2900282770","https://openalex.org/W2969860674","https://openalex.org/W3033229256","https://openalex.org/W3137946936","https://openalex.org/W3138783654","https://openalex.org/W3140491875","https://openalex.org/W3163465001","https://openalex.org/W3173351640","https://openalex.org/W4229005866","https://openalex.org/W4292120591","https://openalex.org/W4300171661","https://openalex.org/W4302296459","https://openalex.org/W4313546834","https://openalex.org/W4321500424","https://openalex.org/W4360831791","https://openalex.org/W4385617589","https://openalex.org/W4390481650","https://openalex.org/W4390784305","https://openalex.org/W4399496882","https://openalex.org/W4400811629","https://openalex.org/W4407791414","https://openalex.org/W4409064026","https://openalex.org/W6637151318","https://openalex.org/W6766884604","https://openalex.org/W6773733858","https://openalex.org/W6784225549","https://openalex.org/W6784333009","https://openalex.org/W6789976215","https://openalex.org/W6795581714","https://openalex.org/W6811340617","https://openalex.org/W6811928498","https://openalex.org/W6847270807","https://openalex.org/W6847478871","https://openalex.org/W6860333965","https://openalex.org/W6870031110"],"related_works":["https://openalex.org/W4396891704","https://openalex.org/W2951049725","https://openalex.org/W4285308918","https://openalex.org/W4387459935","https://openalex.org/W3015991694","https://openalex.org/W2908450434","https://openalex.org/W3193008624","https://openalex.org/W4382561696","https://openalex.org/W2581119583","https://openalex.org/W2895519962"],"abstract_inverted_index":{"We":[0],"present":[1],"OctopuScheduler,":[2],"the":[3,10,20,55,58,71,75,101,127],"first":[4],"generalized":[5],"on-chip":[6,62],"scheduling":[7,63,93],"framework":[8,94],"for":[9,40,79,95],"accelerated":[11],"inference":[12],"of":[13,27,36,77,121],"non-spiking":[14],"deep":[15,97,109],"neural":[16,81,98,112],"networks":[17,82,99],"(DNNs)":[18],"on":[19,126],"neuromorphic":[21,119,128],"hardware":[22],"platform":[23],"SpiNNaker2.":[24,132],"The":[25,61],"goal":[26],"OctopuScheduler":[28],"is":[29],"to":[30,49,57,66,103],"flexibly":[31],"support":[32],"a":[33,50,88,92],"wide":[34],"variety":[35],"state-of-the-art":[37,123],"DNN":[38,124],"architectures":[39,86,125],"different":[41],"domains,":[42],"moving":[43],"from":[44],"an":[45],"application-specific":[46],"custom":[47],"implementation":[48],"generally":[51],"applicable":[52],"framework,":[53],"simplifying":[54],"access":[56],"SpiNNaker2":[59],"platform.":[60],"approach":[64],"allows":[65],"minimize":[67],"communication":[68],"latencies":[69],"with":[70,106],"host,":[72],"completely":[73],"controlling":[74],"execution":[76],"layers":[78],"convolutional":[80],"(CNNs)":[83],"and":[84,110,118],"transformer":[85],"within":[87],"single":[89],"chip.OctopuScheduler":[90],"as":[91],"classical":[96,122],"has":[100],"potential":[102],"unlock":[104],"experimentation":[105],"large-scale":[107],"hybrid":[108],"spiking":[111],"network":[113],"(SNN)":[114],"architectures,":[115],"event-based":[116],"computing":[117],"modifications":[120],"multi-processor":[129],"system-on-chip":[130],"(MPSoC)":[131]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}