{"id":"https://openalex.org/W2903823781","doi":"https://doi.org/10.1109/ngcas.2018.8572223","title":"Comprehensive Comparison of NULL Convention Logic Threshold Gate Implementations","display_name":"Comprehensive Comparison of NULL Convention Logic Threshold Gate Implementations","publication_year":2018,"publication_date":"2018-11-01","ids":{"openalex":"https://openalex.org/W2903823781","doi":"https://doi.org/10.1109/ngcas.2018.8572223","mag":"2903823781"},"language":"en","primary_location":{"id":"doi:10.1109/ngcas.2018.8572223","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ngcas.2018.8572223","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 New Generation of CAS (NGCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5086240535","display_name":"Kelby Haulmark","orcid":null},"institutions":[{"id":"https://openalex.org/I78715868","display_name":"University of Arkansas at Fayetteville","ror":"https://ror.org/05jbt9m15","country_code":"US","type":"education","lineage":["https://openalex.org/I78715868"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Kelby Haulmark","raw_affiliation_strings":["Department of Computer Engineering, University of Arkansas, Fayetteville, Arkansas, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, University of Arkansas, Fayetteville, Arkansas, USA","institution_ids":["https://openalex.org/I78715868"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000592355","display_name":"Wassim Khalil","orcid":"https://orcid.org/0000-0002-2178-5885"},"institutions":[{"id":"https://openalex.org/I78715868","display_name":"University of Arkansas at Fayetteville","ror":"https://ror.org/05jbt9m15","country_code":"US","type":"education","lineage":["https://openalex.org/I78715868"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wassim Khalil","raw_affiliation_strings":["Department of Computer Engineering, University of Arkansas, Fayetteville, Arkansas, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, University of Arkansas, Fayetteville, Arkansas, USA","institution_ids":["https://openalex.org/I78715868"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005782599","display_name":"William Bouillon","orcid":null},"institutions":[{"id":"https://openalex.org/I78715868","display_name":"University of Arkansas at Fayetteville","ror":"https://ror.org/05jbt9m15","country_code":"US","type":"education","lineage":["https://openalex.org/I78715868"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"William Bouillon","raw_affiliation_strings":["Department of Computer Engineering, University of Arkansas, Fayetteville, Arkansas, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, University of Arkansas, Fayetteville, Arkansas, USA","institution_ids":["https://openalex.org/I78715868"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101644887","display_name":"Jia Di","orcid":"https://orcid.org/0000-0001-7718-0220"},"institutions":[{"id":"https://openalex.org/I78715868","display_name":"University of Arkansas at Fayetteville","ror":"https://ror.org/05jbt9m15","country_code":"US","type":"education","lineage":["https://openalex.org/I78715868"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jia Di","raw_affiliation_strings":["Department of Computer Engineering, University of Arkansas, Fayetteville, Arkansas, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, University of Arkansas, Fayetteville, Arkansas, USA","institution_ids":["https://openalex.org/I78715868"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5086240535"],"corresponding_institution_ids":["https://openalex.org/I78715868"],"apc_list":null,"apc_paid":null,"fwci":0.1309,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.51355715,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"1","issue":null,"first_page":"37","last_page":"40"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.7738773822784424},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.7616465091705322},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7216811180114746},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.674553394317627},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.592153787612915},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.52020663022995},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.48771461844444275},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.45454901456832886},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.45369935035705566},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4524385929107666},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.44323045015335083},{"id":"https://openalex.org/keywords/logic-optimization","display_name":"Logic optimization","score":0.4291258752346039},{"id":"https://openalex.org/keywords/interference","display_name":"Interference (communication)","score":0.41057348251342773},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.21347373723983765},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.15830811858177185},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15037977695465088},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1364946961402893},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.12590238451957703},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11512452363967896},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.10127875208854675}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.7738773822784424},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.7616465091705322},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7216811180114746},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.674553394317627},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.592153787612915},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.52020663022995},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.48771461844444275},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.45454901456832886},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.45369935035705566},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4524385929107666},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.44323045015335083},{"id":"https://openalex.org/C28449271","wikidata":"https://www.wikidata.org/wiki/Q6667469","display_name":"Logic optimization","level":4,"score":0.4291258752346039},{"id":"https://openalex.org/C32022120","wikidata":"https://www.wikidata.org/wiki/Q797225","display_name":"Interference (communication)","level":3,"score":0.41057348251342773},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.21347373723983765},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.15830811858177185},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15037977695465088},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1364946961402893},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.12590238451957703},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11512452363967896},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.10127875208854675},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ngcas.2018.8572223","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ngcas.2018.8572223","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 New Generation of CAS (NGCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1516918745","https://openalex.org/W1963540388","https://openalex.org/W1978298297","https://openalex.org/W2029430885","https://openalex.org/W2031144864","https://openalex.org/W2081240624","https://openalex.org/W2137458827","https://openalex.org/W3148985627","https://openalex.org/W6680111853"],"related_works":["https://openalex.org/W1966764473","https://openalex.org/W2098419840","https://openalex.org/W2121963733","https://openalex.org/W1977171228","https://openalex.org/W2356140560","https://openalex.org/W4249951793","https://openalex.org/W2789349722","https://openalex.org/W2170504327","https://openalex.org/W2102927888","https://openalex.org/W2150981204"],"abstract_inverted_index":{"Asynchronous":[0],"circuits":[1],"offer":[2],"many":[3],"advantages":[4],"including":[5],"no":[6],"clock,":[7],"reliable":[8],"operation,":[9],"flexible":[10],"timing":[11],"requirement,":[12],"and":[13,56,64],"low":[14],"electro-magnetic":[15],"interference.":[16],"NULL":[17],"Convention":[18],"Logic":[19],"(NCL),":[20],"as":[21,31],"a":[22],"popular":[23],"quasi-delay-insensitive":[24],"asynchronous":[25],"design":[26,76],"paradigm,":[27],"incorporates":[28],"threshold":[29],"gates":[30,39],"its":[32],"logic":[33],"family.":[34],"The":[35,62],"implementations":[36,52],"of":[37,44],"these":[38],"directly":[40],"impact":[41],"the":[42,73],"performance":[43],"NCL":[45,51],"circuits.":[46],"This":[47],"paper":[48],"features":[49],"eight":[50],"published":[53],"in":[54],"literature":[55],"compares":[57],"them":[58],"across":[59],"various":[60],"metrics.":[61],"results":[63],"analysis":[65],"can":[66],"be":[67],"used":[68],"by":[69],"designers":[70],"for":[71,77],"selecting":[72],"most":[74],"appropriate":[75],"their":[78],"specific":[79],"applications.":[80]},"counts_by_year":[{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1}],"updated_date":"2026-05-05T08:41:31.759640","created_date":"2025-10-10T00:00:00"}
