{"id":"https://openalex.org/W3117481056","doi":"https://doi.org/10.1109/nfv-sdn50289.2020.9289901","title":"FlexTCAM: Beyond Memory Based TCAM Emulation on FPGAs","display_name":"FlexTCAM: Beyond Memory Based TCAM Emulation on FPGAs","publication_year":2020,"publication_date":"2020-11-10","ids":{"openalex":"https://openalex.org/W3117481056","doi":"https://doi.org/10.1109/nfv-sdn50289.2020.9289901","mag":"3117481056"},"language":"en","primary_location":{"id":"doi:10.1109/nfv-sdn50289.2020.9289901","is_oa":false,"landing_page_url":"https://doi.org/10.1109/nfv-sdn50289.2020.9289901","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042340641","display_name":"Anees Ullah","orcid":"https://orcid.org/0000-0002-4770-4967"},"institutions":[{"id":"https://openalex.org/I90610274","display_name":"University of Engineering and Technology Peshawar","ror":"https://ror.org/00p034093","country_code":"PK","type":"education","lineage":["https://openalex.org/I90610274"]}],"countries":["PK"],"is_corresponding":false,"raw_author_name":"Anees Ullah","raw_affiliation_strings":["University of Engineering and Technology, Peshawar, Abbottabad, Pakistan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Engineering and Technology, Peshawar, Abbottabad, Pakistan","institution_ids":["https://openalex.org/I90610274"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5097576187","display_name":"Salvatore-Pontarelli","orcid":null},"institutions":[{"id":"https://openalex.org/I4210099310","display_name":"Consorzio Nazionale Interuniversitario per le Telecomunicazioni","ror":"https://ror.org/0182a5n39","country_code":"IT","type":"funder","lineage":["https://openalex.org/I4210099310"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Salvatore-Pontarelli","raw_affiliation_strings":["Consorzio Nazionale Interuniversitario per le Telecomunicazioni (CNIT), Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Consorzio Nazionale Interuniversitario per le Telecomunicazioni (CNIT), Italy","institution_ids":["https://openalex.org/I4210099310"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5080322790","display_name":"Pedro Reviriego","orcid":"https://orcid.org/0000-0003-2540-5234"},"institutions":[{"id":"https://openalex.org/I50357001","display_name":"Universidad Carlos III de Madrid","ror":"https://ror.org/03ths8210","country_code":"ES","type":"education","lineage":["https://openalex.org/I50357001"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Pedro Reviriego","raw_affiliation_strings":["Universidad Carlos III de Madrid, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universidad Carlos III de Madrid, Spain","institution_ids":["https://openalex.org/I50357001"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.236,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.53359628,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"110","last_page":"113"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10400","display_name":"Network Security and Intrusion Detection","score":0.9937000274658203,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10714","display_name":"Software-Defined Networks and 5G","score":0.9894000291824341,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7861359715461731},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7544880509376526},{"id":"https://openalex.org/keywords/reconfigurability","display_name":"Reconfigurability","score":0.6989059448242188},{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.6735096573829651},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.582282304763794},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1534048616886139}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7861359715461731},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7544880509376526},{"id":"https://openalex.org/C2780149590","wikidata":"https://www.wikidata.org/wiki/Q7302742","display_name":"Reconfigurability","level":2,"score":0.6989059448242188},{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.6735096573829651},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.582282304763794},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1534048616886139},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/nfv-sdn50289.2020.9289901","is_oa":false,"landing_page_url":"https://doi.org/10.1109/nfv-sdn50289.2020.9289901","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1996635038","https://openalex.org/W2041849429","https://openalex.org/W2062143991","https://openalex.org/W2139751271","https://openalex.org/W2140025163","https://openalex.org/W2561621772","https://openalex.org/W2767585707","https://openalex.org/W2906604693","https://openalex.org/W2929407385","https://openalex.org/W2933246250","https://openalex.org/W4239721110"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2748952813","https://openalex.org/W1544665014","https://openalex.org/W2748364266","https://openalex.org/W2159103767","https://openalex.org/W2133965417","https://openalex.org/W2096844293","https://openalex.org/W2363944576","https://openalex.org/W2351041855","https://openalex.org/W2570254841"],"abstract_inverted_index":{"Field":[0],"Programmable":[1],"Gate":[2],"Arrays":[3],"(FPGAs)":[4],"have":[5,14,153],"evolved":[6],"into":[7],"large":[8,144],"system":[9,216],"on":[10,151,165,173],"chip":[11],"devices":[12],"that":[13,52,84,182],"high":[15],"speed":[16],"network":[17],"interfaces,":[18],"processors":[19],"and":[20,25,100,130,193,231,237],"vast":[21],"amounts":[22],"of":[23,81,124,126,133,146,168,210,239,247],"logic":[24],"memory":[26,90,170],"blocks.":[27],"This":[28,116,199,221],"coupled":[29],"with":[30,224],"their":[31,131],"inherent":[32],"reconfigurability,":[33],"makes":[34,200],"them":[35,201],"an":[36,75],"attractive":[37],"platform":[38],"to":[39,68,119,148,213],"implement":[40,69,214],"Software":[41],"Defined":[42],"Networking":[43],"(SDN)":[44],"systems.":[45],"However,":[46,108],"there":[47],"is":[48,53,117,180,222],"one":[49,89],"piece":[50],"missing":[51],"used":[54,67],"in":[55,88,103,113,122,139,156,204,233,252],"most":[56],"networking":[57],"devices:":[58],"Ternary":[59],"Content":[60],"Addressable":[61],"Memories":[62],"(TCAMs).":[63],"TCAMs":[64,72,92,127,150,185,192],"are":[65,93,101,110,163,186],"widely":[66],"packet":[70,137],"classification.":[71],"can":[73,194,217],"match":[74],"incoming":[76],"key":[77],"against":[78],"a":[79,143,215],"set":[80],"stored":[82],"rules":[83,211,251],"include":[85],"wildcard":[86],"bits":[87],"access.":[91],"usually":[94],"designed":[95],"as":[96,207],"specific":[97],"hardware":[98,128],"blocks":[99,129,171],"included":[102],"almost":[104],"all":[105],"switching":[106],"ASICs.":[107],"they":[109,162],"not":[111],"implemented":[112],"FPGA":[114,140,183,254],"devices.":[115],"due":[118],"the":[120,166,169,174,208,245,253],"cost":[121],"terms":[123],"area/power":[125],"lack":[132],"flexibility.":[134],"To":[135],"provide":[136],"classification":[138],"based":[141,164],"systems,":[142],"number":[145,209],"schemes":[147],"emulate":[149],"FPGAs":[152],"been":[154],"proposed":[155],"recent":[157],"years.":[158],"In":[159,176],"many":[160],"cases,":[161],"use":[167],"available":[172],"FPGA.":[175],"this":[177],"paper,":[178],"it":[179],"shown":[181],"emulated":[184,255],"actually":[187],"more":[188,196,202,249],"powerful":[189],"than":[190],"traditional":[191],"support":[195],"generic":[197,250],"rules.":[198],"efficient":[203],"some":[205],"applications":[206],"needed":[212],"be":[218],"significantly":[219],"reduced.":[220],"illustrated":[223],"two":[225],"case":[226],"studies:":[227],"supporting":[228],"port":[229],"lists":[230,236],"ranges":[232],"access":[234],"control":[235],"blacklisting":[238],"IP":[240],"addresses.":[241],"The":[242],"results":[243],"show":[244],"benefits":[246],"using":[248],"TCAMs.":[256]},"counts_by_year":[{"year":2022,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}