{"id":"https://openalex.org/W7076205701","doi":"https://doi.org/10.1109/newcas64648.2025.11107040","title":"Improved High-Radix Carry-Save Adders for Low-Latency Vector Reduction on Fpga","display_name":"Improved High-Radix Carry-Save Adders for Low-Latency Vector Reduction on Fpga","publication_year":2025,"publication_date":"2025-06-22","ids":{"openalex":"https://openalex.org/W7076205701","doi":"https://doi.org/10.1109/newcas64648.2025.11107040"},"language":"en","primary_location":{"id":"doi:10.1109/newcas64648.2025.11107040","is_oa":false,"landing_page_url":"https://doi.org/10.1109/newcas64648.2025.11107040","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 23rd IEEE Interregional NEWCAS Conference (NEWCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Fahimeh Hajizadeh","orcid":null},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Fahimeh Hajizadeh","raw_affiliation_strings":["Polytechnique Montréal,dept. Electrical Engineering,Montréal,Canada"],"affiliations":[{"raw_affiliation_string":"Polytechnique Montréal,dept. Electrical Engineering,Montréal,Canada","institution_ids":["https://openalex.org/I45683168"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Paul-Andr\u00e9 Bisson","orcid":null},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Paul-Andr\u00e9 Bisson","raw_affiliation_strings":["Polytechnique Montréal,dept. Electrical Engineering,Montréal,Canada"],"affiliations":[{"raw_affiliation_string":"Polytechnique Montréal,dept. Electrical Engineering,Montréal,Canada","institution_ids":["https://openalex.org/I45683168"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Tarek Ould-Bachir","orcid":null},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Tarek Ould-Bachir","raw_affiliation_strings":["Polytechnique Montréal,dept. Electrical Engineering,Montréal,Canada"],"affiliations":[{"raw_affiliation_string":"Polytechnique Montréal,dept. Electrical Engineering,Montréal,Canada","institution_ids":["https://openalex.org/I45683168"]}]},{"author_position":"last","author":{"id":null,"display_name":"Jean-Pierre David","orcid":null},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Jean-Pierre David","raw_affiliation_strings":["Polytechnique Montréal,dept. Electrical Engineering,Montréal,Canada"],"affiliations":[{"raw_affiliation_string":"Polytechnique Montréal,dept. Electrical Engineering,Montréal,Canada","institution_ids":["https://openalex.org/I45683168"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I45683168"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.25300047,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"221","last_page":"225"},"is_retracted":false,"is_paratext":false,"is_xpac":true,"primary_topic":{"id":"https://openalex.org/T12157","display_name":"Geochemistry and Geologic Mapping","score":0.6248000264167786,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12157","display_name":"Geochemistry and Geologic Mapping","score":0.6248000264167786,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13067","display_name":"Geological Modeling and Analysis","score":0.026599999517202377,"subfield":{"id":"https://openalex.org/subfields/1906","display_name":"Geochemistry and Petrology"},"field":{"id":"https://openalex.org/fields/19","display_name":"Earth and Planetary Sciences"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14311","display_name":"Electrical and Electromagnetic Research","score":0.023499999195337296,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.9509999752044678},{"id":"https://openalex.org/keywords/operand","display_name":"Operand","score":0.7343000173568726},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6223000288009644},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.5802000164985657},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5634999871253967},{"id":"https://openalex.org/keywords/carry-save-adder","display_name":"Carry-save adder","score":0.49410000443458557},{"id":"https://openalex.org/keywords/serial-binary-adder","display_name":"Serial binary adder","score":0.460999995470047}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.9509999752044678},{"id":"https://openalex.org/C55526617","wikidata":"https://www.wikidata.org/wiki/Q719375","display_name":"Operand","level":2,"score":0.7343000173568726},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7315000295639038},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6223000288009644},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.5802000164985657},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.5669999718666077},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5634999871253967},{"id":"https://openalex.org/C3227080","wikidata":"https://www.wikidata.org/wiki/Q5046770","display_name":"Carry-save adder","level":4,"score":0.49410000443458557},{"id":"https://openalex.org/C116206932","wikidata":"https://www.wikidata.org/wiki/Q7454686","display_name":"Serial binary adder","level":4,"score":0.460999995470047},{"id":"https://openalex.org/C97137487","wikidata":"https://www.wikidata.org/wiki/Q729138","display_name":"Integer (computer science)","level":2,"score":0.4180999994277954},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.39809998869895935},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.37529999017715454},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.37299999594688416},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.3700999915599823},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.3578000068664551},{"id":"https://openalex.org/C33652231","wikidata":"https://www.wikidata.org/wiki/Q194368","display_name":"16-bit","level":2,"score":0.3361000120639801},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3310000002384186},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.27649998664855957},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.2535000145435333},{"id":"https://openalex.org/C198386975","wikidata":"https://www.wikidata.org/wiki/Q117785","display_name":"Finite impulse response","level":2,"score":0.2533999979496002},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.251800000667572}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/newcas64648.2025.11107040","is_oa":false,"landing_page_url":"https://doi.org/10.1109/newcas64648.2025.11107040","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 23rd IEEE Interregional NEWCAS Conference (NEWCAS)","raw_type":"proceedings-article"},{"id":"pmh:oai:publications.polymtl.ca:67703","is_oa":false,"landing_page_url":null,"pdf_url":null,"source":{"id":"https://openalex.org/S4306401013","display_name":"PolyPublie (\u00c9cole Polytechnique de Montr\u00e9al)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I45683168","host_organization_name":"Polytechnique Montr\u00e9al","host_organization_lineage":["https://openalex.org/I45683168"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":null,"raw_type":"PeerReviewed"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7204266786575317,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1966033478","https://openalex.org/W1967476488","https://openalex.org/W2745213616","https://openalex.org/W2791434141","https://openalex.org/W2906611591","https://openalex.org/W2972193649","https://openalex.org/W3003605879","https://openalex.org/W3010779629","https://openalex.org/W3119052199","https://openalex.org/W3127734085","https://openalex.org/W3166559827","https://openalex.org/W4389675774","https://openalex.org/W4402593656"],"related_works":[],"abstract_inverted_index":{"Efficient":[0],"summation":[1,103],"of":[2,55,76,104,119],"multiple":[3],"inputs":[4],"is":[5,49],"critical":[6],"in":[7,85,111,124],"many":[8],"FPGA-based":[9],"applications,":[10],"requiring":[11],"optimized":[12,129],"arithmetic":[13,126],"units":[14],"for":[15,81],"reduced":[16],"latency":[17],"and":[18,29],"resource":[19,130],"utilization.":[20],"This":[21],"paper":[22],"explores":[23],"the":[24,45,53,56,68,82,92,97,117,120],"high-radix":[25],"carry-save":[26],"(HRCS)":[27],"format":[28,88],"proposes":[30],"a":[31,40],"novel":[32],"carry":[33],"chain":[34],"architecture":[35],"to":[36,51,78,106],"improve":[37],"latency.":[38],"Moreover,":[39],"vector":[41],"reduction":[42],"operation":[43],"using":[44],"improved":[46,69],"HRCS":[47,58,70,122],"adders":[48],"presented":[50],"highlight":[52],"impact":[54],"low-latency":[57],"adder":[59,71,123],"on":[60,109],"high-scale":[61],"integer":[62],"additions.":[63],"Experimental":[64],"results":[65],"show":[66],"that":[67],"achieves":[72],"significant":[73],"delay":[74],"reductions":[75],"up":[77,105],"29.5":[79],"%":[80],"vsum":[83],"32":[84,107],"radix-":[86],"64":[87],"while":[89],"maintaining":[90],"nearly":[91],"same":[93],"LUT":[94],"utilization":[95],"as":[96],"baseline":[98],"design.":[99],"Notably,":[100],"vsum32":[101],"enables":[102],"operands":[108],"FPGA":[110],"less":[112],"than":[113],"4":[114],"ns,":[115],"showcasing":[116],"effectiveness":[118],"proposed":[121],"high-speed":[125],"applications":[127],"with":[128],"efficiency.":[131]},"counts_by_year":[],"updated_date":"2025-12-28T23:10:05.387466","created_date":"2025-10-10T00:00:00"}