{"id":"https://openalex.org/W4289926494","doi":"https://doi.org/10.1109/newcas52662.2022.9841969","title":"Operational Conditions Analysis for Memristive Stateful Logics - A Study on IMPLY and TMSL","display_name":"Operational Conditions Analysis for Memristive Stateful Logics - A Study on IMPLY and TMSL","publication_year":2022,"publication_date":"2022-06-19","ids":{"openalex":"https://openalex.org/W4289926494","doi":"https://doi.org/10.1109/newcas52662.2022.9841969"},"language":"en","primary_location":{"id":"doi:10.1109/newcas52662.2022.9841969","is_oa":false,"landing_page_url":"https://doi.org/10.1109/newcas52662.2022.9841969","pdf_url":null,"source":{"id":"https://openalex.org/S4363608492","display_name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023734432","display_name":"Roya Rahimi Disfani","orcid":"https://orcid.org/0009-0009-0439-6413"},"institutions":[{"id":"https://openalex.org/I84248293","display_name":"Babol Noshirvani University of Technology","ror":"https://ror.org/02zc85170","country_code":"IR","type":"education","lineage":["https://openalex.org/I84248293"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Roya Rahimi Disfani","raw_affiliation_strings":["Babol Noshirvani University of Technology,Babol,Iran","Babol Noshirvani University of Technology, Babol, Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Babol Noshirvani University of Technology,Babol,Iran","institution_ids":["https://openalex.org/I84248293"]},{"raw_affiliation_string":"Babol Noshirvani University of Technology, Babol, Iran","institution_ids":["https://openalex.org/I84248293"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050080301","display_name":"Nima TaheriNejad","orcid":"https://orcid.org/0000-0002-1295-0332"},"institutions":[{"id":"https://openalex.org/I145847075","display_name":"TU Wien","ror":"https://ror.org/04d836q62","country_code":"AT","type":"education","lineage":["https://openalex.org/I145847075"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Nima TaheriNejad","raw_affiliation_strings":["TU Wien,Vienna,Austria","TU Wien, Vienna, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TU Wien,Vienna,Austria","institution_ids":["https://openalex.org/I145847075"]},{"raw_affiliation_string":"TU Wien, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5067288450","display_name":"Mojtaba Valinataj","orcid":"https://orcid.org/0000-0002-6536-373X"},"institutions":[{"id":"https://openalex.org/I84248293","display_name":"Babol Noshirvani University of Technology","ror":"https://ror.org/02zc85170","country_code":"IR","type":"education","lineage":["https://openalex.org/I84248293"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Mojtaba Valinataj","raw_affiliation_strings":["Babol Noshirvani University of Technology,Babol,Iran","Babol Noshirvani University of Technology, Babol, Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Babol Noshirvani University of Technology,Babol,Iran","institution_ids":["https://openalex.org/I84248293"]},{"raw_affiliation_string":"Babol Noshirvani University of Technology, Babol, Iran","institution_ids":["https://openalex.org/I84248293"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"480","last_page":"484"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/stateful-firewall","display_name":"Stateful firewall","score":0.9847264289855957},{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.8044790029525757},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7060160636901855},{"id":"https://openalex.org/keywords/von-neumann-architecture","display_name":"Von Neumann architecture","score":0.6257050037384033},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.5504475831985474},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.40665188431739807},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.16765537858009338},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.13628801703453064},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.13312086462974548},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.0971750020980835}],"concepts":[{"id":"https://openalex.org/C22927095","wikidata":"https://www.wikidata.org/wiki/Q1784206","display_name":"Stateful firewall","level":3,"score":0.9847264289855957},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.8044790029525757},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7060160636901855},{"id":"https://openalex.org/C80469333","wikidata":"https://www.wikidata.org/wiki/Q189088","display_name":"Von Neumann architecture","level":2,"score":0.6257050037384033},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.5504475831985474},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.40665188431739807},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.16765537858009338},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.13628801703453064},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.13312086462974548},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0971750020980835},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/newcas52662.2022.9841969","is_oa":false,"landing_page_url":"https://doi.org/10.1109/newcas52662.2022.9841969","pdf_url":null,"source":{"id":"https://openalex.org/S4363608492","display_name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8799999952316284,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W1983254208","https://openalex.org/W2025674646","https://openalex.org/W2066280488","https://openalex.org/W2068007821","https://openalex.org/W2081729575","https://openalex.org/W2085205847","https://openalex.org/W2112181056","https://openalex.org/W2122148191","https://openalex.org/W2162651880","https://openalex.org/W2345622364","https://openalex.org/W2396622873","https://openalex.org/W2522667948","https://openalex.org/W2529457757","https://openalex.org/W2557703348","https://openalex.org/W2596796514","https://openalex.org/W2604191638","https://openalex.org/W2664249309","https://openalex.org/W2778935320","https://openalex.org/W2809226946","https://openalex.org/W2900379535","https://openalex.org/W2972614379","https://openalex.org/W2979553033","https://openalex.org/W2990351842","https://openalex.org/W3001855497","https://openalex.org/W3002848853","https://openalex.org/W3128667769","https://openalex.org/W3136861880","https://openalex.org/W4210690620","https://openalex.org/W4287281267","https://openalex.org/W6704402733","https://openalex.org/W6790967271"],"related_works":["https://openalex.org/W2583381754","https://openalex.org/W2144255176","https://openalex.org/W2222333653","https://openalex.org/W4229452466","https://openalex.org/W109977192","https://openalex.org/W1970797462","https://openalex.org/W2019740326","https://openalex.org/W2966276069","https://openalex.org/W3098316772","https://openalex.org/W4200500468"],"abstract_inverted_index":{"Memristive":[0],"technology":[1],"is":[2],"a":[3],"promising":[4],"emerging":[5],"technology,":[6,95,107],"which":[7],"can":[8,25,53],"be":[9,26],"used":[10,27],"as":[11],"storage":[12],"and":[13,21,38,72,128,130,138],"processing":[14],"element.":[15],"Memristors":[16,68],"are":[17,77],"non-volatile,":[18],"compact,":[19],"fast,":[20],"energy":[22],"efficient.":[23],"They":[24],"in":[28,36,96],"logic":[29],"designs":[30],"to":[31],"perform":[32],"basic":[33],"logical":[34],"operations":[35,114],"memory":[37],"thus":[39],"avoid":[40],"the":[41,55,78,81,89,93,101,109,113,132,142],"von-Neumann":[42],"bottleneck.":[43],"Among":[44],"various":[45,135],"possibilities,":[46],"stateful":[47,86,116],"logics":[48],"stand":[49],"out,":[50],"since":[51],"they":[52],"process":[54],"data":[56,59],"with":[57],"minimum":[58],"movement.":[60],"Material":[61],"Implication":[62],"(IMPLY),":[63],"Memristor-Aided":[64],"Logic":[65,70],"(MAGIC),":[66],"Three":[67],"Stateful":[69],"(TMSL)":[71],"Single-cycle":[73],"Inmemristor":[74],"XOR":[75],"(SIXOR)":[76],"some":[79],"of":[80,84,92,103,105,115,134,144],"main":[82],"examples":[83],"memristor-based":[85],"logics.":[87],"Given":[88],"maturing":[90],"state":[91],"memristive":[94],"this":[97,106],"paper,":[98],"we":[99,120],"evaluate":[100],"effect":[102,133],"non-idealities":[104],"especially":[108],"device":[110,139],"variations,":[111],"on":[112,122,141],"logic.":[117],"In":[118],"particular,":[119],"focus":[121],"two":[123],"well-received":[124],"logics,":[125],"namely":[126],"IMPLY":[127],"TMSL,":[129],"analyze":[131],"operational":[136],"conditions":[137],"variations":[140],"functionality":[143],"these":[145],"gates.":[146]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
