{"id":"https://openalex.org/W3048341205","doi":"https://doi.org/10.1109/newcas49341.2020.9159844","title":"A New Single Event Transient Hardened Floating Gate Configurable Logic Circuit","display_name":"A New Single Event Transient Hardened Floating Gate Configurable Logic Circuit","publication_year":2020,"publication_date":"2020-06-01","ids":{"openalex":"https://openalex.org/W3048341205","doi":"https://doi.org/10.1109/newcas49341.2020.9159844","mag":"3048341205"},"language":"en","primary_location":{"id":"doi:10.1109/newcas49341.2020.9159844","is_oa":false,"landing_page_url":"https://doi.org/10.1109/newcas49341.2020.9159844","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004083312","display_name":"Sarah Azimi","orcid":"https://orcid.org/0000-0002-9169-6140"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Sarah Azimi","raw_affiliation_strings":["Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018567565","display_name":"Corrado De Sio","orcid":"https://orcid.org/0000-0003-4212-3052"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Corrado De Sio","raw_affiliation_strings":["Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004449757","display_name":"Weitao Yang","orcid":"https://orcid.org/0000-0001-8815-7296"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Weitao Yang","raw_affiliation_strings":["Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5021426042","display_name":"Luca Sterpone","orcid":"https://orcid.org/0000-0002-3080-2560"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luca Sterpone","raw_affiliation_strings":["Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I177477856"],"apc_list":null,"apc_paid":null,"fwci":1.0735,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.71943211,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"311","last_page":"314"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9952999949455261,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/soft-error","display_name":"Soft error","score":0.6917698979377747},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.6718745827674866},{"id":"https://openalex.org/keywords/single-event-upset","display_name":"Single event upset","score":0.6254530549049377},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.617225170135498},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.606015145778656},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5984283685684204},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5951462984085083},{"id":"https://openalex.org/keywords/transient","display_name":"Transient (computer programming)","score":0.5634989738464355},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5427842140197754},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.47771620750427246},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4602910280227661},{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.45327815413475037},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.44599205255508423},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.429185688495636},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.36179229617118835},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.33056026697158813},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.28061598539352417},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.18223372101783752},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.17399266362190247},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.11222490668296814},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.11216554045677185}],"concepts":[{"id":"https://openalex.org/C154474529","wikidata":"https://www.wikidata.org/wiki/Q1658917","display_name":"Soft error","level":2,"score":0.6917698979377747},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.6718745827674866},{"id":"https://openalex.org/C2780073065","wikidata":"https://www.wikidata.org/wiki/Q1476733","display_name":"Single event upset","level":3,"score":0.6254530549049377},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.617225170135498},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.606015145778656},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5984283685684204},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5951462984085083},{"id":"https://openalex.org/C2780799671","wikidata":"https://www.wikidata.org/wiki/Q17087362","display_name":"Transient (computer programming)","level":2,"score":0.5634989738464355},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5427842140197754},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.47771620750427246},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4602910280227661},{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.45327815413475037},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.44599205255508423},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.429185688495636},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.36179229617118835},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.33056026697158813},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.28061598539352417},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.18223372101783752},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.17399266362190247},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.11222490668296814},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.11216554045677185},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/newcas49341.2020.9159844","is_oa":false,"landing_page_url":"https://doi.org/10.1109/newcas49341.2020.9159844","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.6600000262260437}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1486119332","https://openalex.org/W2048751700","https://openalex.org/W2124618076","https://openalex.org/W2128158076","https://openalex.org/W2146005144","https://openalex.org/W2167839483","https://openalex.org/W2263373136","https://openalex.org/W2339836056","https://openalex.org/W2408761616","https://openalex.org/W2520921847","https://openalex.org/W2604465481","https://openalex.org/W2613814266","https://openalex.org/W3081367468","https://openalex.org/W6737710655"],"related_works":["https://openalex.org/W1975343266","https://openalex.org/W2622269177","https://openalex.org/W1523508240","https://openalex.org/W2531550288","https://openalex.org/W2102538861","https://openalex.org/W2149041233","https://openalex.org/W2042259532","https://openalex.org/W2171347834","https://openalex.org/W2066042903","https://openalex.org/W2122334461"],"abstract_inverted_index":{"Radiation-induced":[0],"soft":[1],"errors":[2],"have":[3],"become":[4],"a":[5,62,67,86,108],"significant":[6],"reliability":[7],"challenge":[8],"in":[9,44,107,115],"modern":[10,37],"CMOS":[11],"logic.":[12],"The":[13],"main":[14],"concern":[15],"for":[16,65],"safety-critical":[17],"applications":[18],"such":[19],"aerospace":[20],"is":[21],"due":[22,88],"to":[23,89],"Single":[24],"Event":[25],"Transient":[26],"(SET)":[27],"effects.":[28],"SETs":[29],"are":[30,42],"exacerbated":[31],"by":[32,75],"the":[33,50,72,77,82,124],"technology":[34],"scaling":[35],"of":[36,53,85,91,119],"technologies":[38],"especially":[39],"when":[40],"they":[41],"adopted":[43],"harsh":[45],"environments.":[46],"This":[47],"paper":[48],"evaluates":[49],"SET":[51,68,117],"sensitivity":[52],"state-of-the-art":[54],"floating":[55],"gate":[56],"configurable":[57,93],"logic":[58,73],"circuit":[59],"and":[60],"proposes":[61],"novel":[63],"methodology":[64],"filtering":[66,116],"pulse":[69],"generated":[70],"inside":[71],"cells":[74],"increasing":[76],"charge":[78],"sharing":[79],"effect":[80],"on":[81,102,123],"sensitive":[83],"node":[84],"cell":[87],"remapping":[90],"its":[92],"switches.":[94],"Experimental":[95],"results,":[96],"performed":[97],"with":[98,126],"radiation":[99],"particle":[100],"simulation":[101],"several":[103],"benchmark":[104],"circuits":[105],"implemented":[106],"130nm":[109],"floating-gate":[110],"device":[111],"demonstrate":[112],"an":[113],"improvement":[114],"effects":[118],"more":[120],"than":[121],"24%":[122],"average":[125],"negligible":[127],"delay":[128],"degradation.":[129]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}