{"id":"https://openalex.org/W3047759693","doi":"https://doi.org/10.1109/newcas49341.2020.9159814","title":"Heterogeneous Distributed SRAM Configuration for Energy-Efficient Deep CNN Accelerators","display_name":"Heterogeneous Distributed SRAM Configuration for Energy-Efficient Deep CNN Accelerators","publication_year":2020,"publication_date":"2020-06-01","ids":{"openalex":"https://openalex.org/W3047759693","doi":"https://doi.org/10.1109/newcas49341.2020.9159814","mag":"3047759693"},"language":"en","primary_location":{"id":"doi:10.1109/newcas49341.2020.9159814","is_oa":false,"landing_page_url":"https://doi.org/10.1109/newcas49341.2020.9159814","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101536165","display_name":"Mehdi Ahmadi","orcid":"https://orcid.org/0000-0002-1334-7148"},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Mehdi Ahmadi","raw_affiliation_strings":["Department of Computer and Software Engineering, Polytechnique Montr\u00e9al, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Computer and Software Engineering, Polytechnique Montr\u00e9al, Canada","institution_ids":["https://openalex.org/I45683168"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051647673","display_name":"Shervin Vakili","orcid":"https://orcid.org/0000-0002-4791-9298"},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Shervin Vakili","raw_affiliation_strings":["Department of Computer and Software Engineering, Polytechnique Montr\u00e9al, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Computer and Software Engineering, Polytechnique Montr\u00e9al, Canada","institution_ids":["https://openalex.org/I45683168"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032933923","display_name":"J. M. Pierre Langlois","orcid":"https://orcid.org/0000-0003-1721-2520"},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"J. M. Pierre Langlois","raw_affiliation_strings":["Department of Computer and Software Engineering, Polytechnique Montr\u00e9al, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Computer and Software Engineering, Polytechnique Montr\u00e9al, Canada","institution_ids":["https://openalex.org/I45683168"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5101536165"],"corresponding_institution_ids":["https://openalex.org/I45683168"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.07930026,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"287","last_page":"290"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.8885201215744019},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8292014002799988},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.783279538154602},{"id":"https://openalex.org/keywords/convolutional-neural-network","display_name":"Convolutional neural network","score":0.6058534383773804},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.5567895770072937},{"id":"https://openalex.org/keywords/universal-memory","display_name":"Universal memory","score":0.48172643780708313},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.47756654024124146},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.45629265904426575},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4523686468601227},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.45023685693740845},{"id":"https://openalex.org/keywords/energy","display_name":"Energy (signal processing)","score":0.43784791231155396},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.43615269660949707},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4269663989543915},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.3947645425796509},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.2131211757659912},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.17925581336021423},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.13924065232276917},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13539043068885803},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10409650206565857},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.08803319931030273},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.07111889123916626}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.8885201215744019},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8292014002799988},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.783279538154602},{"id":"https://openalex.org/C81363708","wikidata":"https://www.wikidata.org/wiki/Q17084460","display_name":"Convolutional neural network","level":2,"score":0.6058534383773804},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.5567895770072937},{"id":"https://openalex.org/C195053848","wikidata":"https://www.wikidata.org/wiki/Q7894141","display_name":"Universal memory","level":5,"score":0.48172643780708313},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.47756654024124146},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.45629265904426575},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4523686468601227},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45023685693740845},{"id":"https://openalex.org/C186370098","wikidata":"https://www.wikidata.org/wiki/Q442787","display_name":"Energy (signal processing)","level":2,"score":0.43784791231155396},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.43615269660949707},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4269663989543915},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.3947645425796509},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.2131211757659912},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.17925581336021423},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.13924065232276917},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13539043068885803},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10409650206565857},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.08803319931030273},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.07111889123916626},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/newcas49341.2020.9159814","is_oa":false,"landing_page_url":"https://doi.org/10.1109/newcas49341.2020.9159814","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)","raw_type":"proceedings-article"},{"id":"pmh:oai:publications.polymtl.ca:46713","is_oa":false,"landing_page_url":"https://publications.polymtl.ca/46713/","pdf_url":null,"source":{"id":"https://openalex.org/S4306401013","display_name":"PolyPublie (\u00c9cole Polytechnique de Montr\u00e9al)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I45683168","host_organization_name":"Polytechnique Montr\u00e9al","host_organization_lineage":["https://openalex.org/I45683168"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Communication de conf\u00e9rence"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.9100000262260437,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1686810756","https://openalex.org/W1999085092","https://openalex.org/W2194775991","https://openalex.org/W2289252105","https://openalex.org/W2593564159","https://openalex.org/W2605487586","https://openalex.org/W2612445135","https://openalex.org/W2727238169","https://openalex.org/W2766143712","https://openalex.org/W2900518541","https://openalex.org/W2945146780","https://openalex.org/W3047129435","https://openalex.org/W4297775537","https://openalex.org/W6734592959"],"related_works":["https://openalex.org/W2516517078","https://openalex.org/W1974599144","https://openalex.org/W2150909864","https://openalex.org/W4382618825","https://openalex.org/W2161286015","https://openalex.org/W4386903460","https://openalex.org/W4384572207","https://openalex.org/W2900372418","https://openalex.org/W2924367614","https://openalex.org/W4211178602"],"abstract_inverted_index":{"Convolutional":[0],"Neural":[1],"Networks":[2],"(CNNs)":[3],"are":[4],"often":[5],"the":[6,46,79,121,126,133,137,144],"first":[7,85],"choice":[8],"for":[9,70,158],"visual":[10],"recognition":[11,19],"systems":[12],"due":[13],"to":[14,114,120,150],"their":[15,29],"high,":[16],"even":[17],"superhuman,":[18],"accuracy.":[20],"The":[21,84,101],"memory":[22,68],"configuration":[23,135],"of":[24,48,57,74,88],"CNN":[25,75],"accelerators":[26,76],"highly":[27],"impacts":[28],"area":[30,138],"and":[31,34,142],"energy":[32,145],"efficiency,":[33],"employing":[35],"on-chip":[36,67],"memories":[37,80],"such":[38],"as":[39],"SRAMs":[40,43,92,108],"is":[41],"unavoidable.":[42],"can":[44],"reduce":[45],"number":[47],"energy-hungry":[49],"DRAM":[50,123],"accesses":[51],"by":[52,139,147],"storing":[53],"a":[54,65,71],"large":[55],"amount":[56],"data":[58,160],"locally.":[59],"In":[60],"this":[61],"paper,":[62],"we":[63],"propose":[64],"new":[66],"configuration,":[69],"certain":[72],"class":[73],"that":[77,132],"divides":[78],"into":[81,93],"two":[82],"groups.":[83],"group":[86,103],"consists":[87],"shallow":[89],"but":[90,106],"wide":[91],"which":[94,152],"parallel":[95],"computational":[96,112],"units":[97,113],"accumulate":[98],"intermediate":[99],"results.":[100],"second":[102],"includes":[104],"narrow":[105],"deep":[107],"shared":[109],"between":[110],"adjacent":[111],"store":[115],"then":[116],"transfer":[117],"final":[118],"results":[119,130],"external":[122],"without":[124],"interrupting":[125],"computation":[127],"process.":[128],"Implementation":[129],"show":[131],"proposed":[134],"reduces":[136],"21":[140],"%":[141],"improves":[143],"efficiency":[146],"18%":[148],"compared":[149],"designs":[151],"use":[153],"an":[154],"ordinary":[155],"ping-pong":[156],"structure":[157],"SRAM-DRAM":[159],"transfer.":[161]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
