{"id":"https://openalex.org/W2744724036","doi":"https://doi.org/10.1109/newcas.2017.8010117","title":"Channel analysis for a 6.4 Gb/s DDR5 data buffer receiver front-end","display_name":"Channel analysis for a 6.4 Gb/s DDR5 data buffer receiver front-end","publication_year":2017,"publication_date":"2017-06-01","ids":{"openalex":"https://openalex.org/W2744724036","doi":"https://doi.org/10.1109/newcas.2017.8010117","mag":"2744724036"},"language":"en","primary_location":{"id":"doi:10.1109/newcas.2017.8010117","is_oa":false,"landing_page_url":"https://doi.org/10.1109/newcas.2017.8010117","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 15th IEEE International New Circuits and Systems Conference (NEWCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5059208641","display_name":"Stefanie Lehmann","orcid":null},"institutions":[{"id":"https://openalex.org/I4577782","display_name":"Technische Universit\u00e4t Berlin","ror":"https://ror.org/03v4gjf40","country_code":"DE","type":"education","lineage":["https://openalex.org/I4577782"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Stefanie Lehmann","raw_affiliation_strings":["Chair Mixed Signal Circuit Design, Technische Universit\u00e4t, Berlin, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair Mixed Signal Circuit Design, Technische Universit\u00e4t, Berlin, Germany","institution_ids":["https://openalex.org/I4577782"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032302022","display_name":"Friedel Gerfers","orcid":"https://orcid.org/0000-0002-0520-1923"},"institutions":[{"id":"https://openalex.org/I4577782","display_name":"Technische Universit\u00e4t Berlin","ror":"https://ror.org/03v4gjf40","country_code":"DE","type":"education","lineage":["https://openalex.org/I4577782"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Friedel Gerfers","raw_affiliation_strings":["Chair Mixed Signal Circuit Design, Technische Universit\u00e4t, Berlin, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair Mixed Signal Circuit Design, Technische Universit\u00e4t, Berlin, Germany","institution_ids":["https://openalex.org/I4577782"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4577782"],"apc_list":null,"apc_paid":null,"fwci":1.1377,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.73093701,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"109","last_page":"112"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9940000176429749,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9940000176429749,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9835000038146973,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9805999994277954,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6994292736053467},{"id":"https://openalex.org/keywords/bit-error-rate","display_name":"Bit error rate","score":0.6264810562133789},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.502591609954834},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.4484729766845703},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.43127867579460144},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3888809084892273},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3292528986930847},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.30504292249679565},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18784427642822266}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6994292736053467},{"id":"https://openalex.org/C56296756","wikidata":"https://www.wikidata.org/wiki/Q840922","display_name":"Bit error rate","level":3,"score":0.6264810562133789},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.502591609954834},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.4484729766845703},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.43127867579460144},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3888809084892273},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3292528986930847},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.30504292249679565},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18784427642822266}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/newcas.2017.8010117","is_oa":false,"landing_page_url":"https://doi.org/10.1109/newcas.2017.8010117","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 15th IEEE International New Circuits and Systems Conference (NEWCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.7400000095367432}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W2159160377","https://openalex.org/W2167987810","https://openalex.org/W3149670108"],"related_works":["https://openalex.org/W1976985527","https://openalex.org/W2354034738","https://openalex.org/W12920314","https://openalex.org/W1963716487","https://openalex.org/W2145169614","https://openalex.org/W4244137926","https://openalex.org/W2382303592","https://openalex.org/W4321448103","https://openalex.org/W1489340745","https://openalex.org/W141697452"],"abstract_inverted_index":{"Modern":[0],"enterprise":[1],"server":[2],"applications":[3],"and":[4,11,122,160,176],"networks":[5],"demand":[6],"higher":[7],"memory":[8,46],"bandwidth,":[9],"throughput":[10],"capacity.":[12],"These":[13],"requirements":[14,101],"are":[15,127,143],"addressed":[16],"by":[17],"the":[18,24,32,39,44,61,66,93,106,118,164,173],"next":[19],"generation":[20],"DDR5-SDRAM":[21],"specification,":[22],"doubling":[23],"data":[25,48,63,140],"rate":[26,162],"to":[27,56,78,99,170],"DDR5-6400":[28],"per":[29],"IO.":[30],"As":[31],"single-ended":[33],"multi-point-to-point":[34],"CPU":[35,87],"channel":[36,89,107,111,120],"architecture":[37,146],"remains":[38],"same":[40],"for":[41,92,102,138],"DDR5":[42,139],"systems,":[43],"load-reduced":[45],"module":[47],"buffer":[49,141],"receiver":[50],"front-end":[51],"requires":[52],"sophisticated":[53],"equalization":[54,104],"techniques":[55],"ensure":[57],"target":[58],"BER":[59],"at":[60,96],"increased":[62],"rates.":[64],"Beside":[65],"insertion":[67],"loss,":[68],"reflections,":[69],"cross-talk":[70],"as":[71,73,114],"well":[72],"power":[74],"supply":[75],"noise":[76],"have":[77],"be":[79],"considered.":[80],"In":[81],"this":[82],"paper,":[83],"a":[84,153],"worst":[85],"case":[86],"back-plane":[88],"is":[90,156],"analyzed":[91,128],"first":[94],"time":[95],"6.4":[97],"Gb/s":[98],"derive":[100],"receiver-side":[103],"from":[105,117,124],"response":[108],"characteristics.":[109],"First,":[110],"impairments":[112],"such":[113],"inter-symbol-interference,":[115],"reflections":[116],"multi-point":[119],"structure,":[121],"crosstalk":[123],"neighboring":[125],"lines":[126],"in":[129,150],"detail.":[130],"Based":[131],"on":[132],"these":[133],"results,":[134],"different":[135],"correction":[136],"methods":[137],"front-ends":[142],"discussed.":[144],"An":[145],"with":[147,152],"1-tap":[148],"FFE":[149],"combination":[151],"multi-tap":[154],"DFE":[155,166],"proposed.":[157],"Extensive":[158],"simulation":[159],"bit-error":[161],"reveal":[163],"required":[165],"tap":[167],"filter":[168],"depth,":[169],"effectively":[171],"eliminate":[172],"dominant":[174],"'Si":[175],"reflection":[177],"based":[178],"error":[179],"components.":[180]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":2}],"updated_date":"2026-08-11T07:18:39.950985","created_date":"2025-10-10T00:00:00"}
