{"id":"https://openalex.org/W1549274093","doi":"https://doi.org/10.1109/newcas.2015.7182002","title":"A general scheme for noise-tolerant logic design based on probabilistic and DCVS approaches","display_name":"A general scheme for noise-tolerant logic design based on probabilistic and DCVS approaches","publication_year":2015,"publication_date":"2015-06-01","ids":{"openalex":"https://openalex.org/W1549274093","doi":"https://doi.org/10.1109/newcas.2015.7182002","mag":"1549274093"},"language":"en","primary_location":{"id":"doi:10.1109/newcas.2015.7182002","is_oa":false,"landing_page_url":"https://doi.org/10.1109/newcas.2015.7182002","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5067715296","display_name":"Xinghua Yang","orcid":"https://orcid.org/0000-0002-5882-0779"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Xinghua Yang","raw_affiliation_strings":["Dept of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology","Institute of Circuit and System, Dept of Electronic Engineering, Tsinghua University, Tsinghua National Laboratory for Information Science and Technology"],"affiliations":[{"raw_affiliation_string":"Dept of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"Institute of Circuit and System, Dept of Electronic Engineering, Tsinghua University, Tsinghua National Laboratory for Information Science and Technology","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063901096","display_name":"Fei Qiao","orcid":"https://orcid.org/0000-0002-5054-9590"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fei Qiao","raw_affiliation_strings":["Dept of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology","Institute of Circuit and System, Dept of Electronic Engineering, Tsinghua University, Tsinghua National Laboratory for Information Science and Technology"],"affiliations":[{"raw_affiliation_string":"Dept of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"Institute of Circuit and System, Dept of Electronic Engineering, Tsinghua University, Tsinghua National Laboratory for Information Science and Technology","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075311656","display_name":"Qi Wei","orcid":"https://orcid.org/0000-0003-3189-7562"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qi Wei","raw_affiliation_strings":["Dept of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology","Institute of Circuit and System, Dept of Electronic Engineering, Tsinghua University, Tsinghua National Laboratory for Information Science and Technology"],"affiliations":[{"raw_affiliation_string":"Dept of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"Institute of Circuit and System, Dept of Electronic Engineering, Tsinghua University, Tsinghua National Laboratory for Information Science and Technology","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5023755254","display_name":"Huazhong Yang","orcid":"https://orcid.org/0000-0003-2421-353X"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Huazhong Yang","raw_affiliation_strings":["Dept of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology","Institute of Circuit and System, Dept of Electronic Engineering, Tsinghua University, Tsinghua National Laboratory for Information Science and Technology"],"affiliations":[{"raw_affiliation_string":"Dept of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"Institute of Circuit and System, Dept of Electronic Engineering, Tsinghua University, Tsinghua National Laboratory for Information Science and Technology","institution_ids":["https://openalex.org/I99065089"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5067715296"],"corresponding_institution_ids":["https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":0.1973,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.55883435,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"56","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9914000034332275,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5750280618667603},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5650929808616638},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.5500227808952332},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5425307154655457},{"id":"https://openalex.org/keywords/cascode","display_name":"Cascode","score":0.539043664932251},{"id":"https://openalex.org/keywords/noise-margin","display_name":"Noise margin","score":0.46248871088027954},{"id":"https://openalex.org/keywords/probabilistic-logic","display_name":"Probabilistic logic","score":0.4591699242591858},{"id":"https://openalex.org/keywords/markov-chain","display_name":"Markov chain","score":0.44631490111351013},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4305571913719177},{"id":"https://openalex.org/keywords/probabilistic-design","display_name":"Probabilistic design","score":0.41343390941619873},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3903791606426239},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.3046872019767761},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.29598313570022583},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.22824081778526306},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20831450819969177},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.17801493406295776}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5750280618667603},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5650929808616638},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.5500227808952332},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5425307154655457},{"id":"https://openalex.org/C2775946640","wikidata":"https://www.wikidata.org/wiki/Q1735017","display_name":"Cascode","level":4,"score":0.539043664932251},{"id":"https://openalex.org/C179499742","wikidata":"https://www.wikidata.org/wiki/Q1324892","display_name":"Noise margin","level":4,"score":0.46248871088027954},{"id":"https://openalex.org/C49937458","wikidata":"https://www.wikidata.org/wiki/Q2599292","display_name":"Probabilistic logic","level":2,"score":0.4591699242591858},{"id":"https://openalex.org/C98763669","wikidata":"https://www.wikidata.org/wiki/Q176645","display_name":"Markov chain","level":2,"score":0.44631490111351013},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4305571913719177},{"id":"https://openalex.org/C154205457","wikidata":"https://www.wikidata.org/wiki/Q2148377","display_name":"Probabilistic design","level":3,"score":0.41343390941619873},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3903791606426239},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.3046872019767761},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.29598313570022583},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.22824081778526306},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20831450819969177},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.17801493406295776},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C34972735","wikidata":"https://www.wikidata.org/wiki/Q2920267","display_name":"Engineering design process","level":2,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/newcas.2015.7182002","is_oa":false,"landing_page_url":"https://doi.org/10.1109/newcas.2015.7182002","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1507028917","https://openalex.org/W2001814110","https://openalex.org/W2006227761","https://openalex.org/W2034449190","https://openalex.org/W2051179129","https://openalex.org/W2070902649","https://openalex.org/W2104578404","https://openalex.org/W2120185818","https://openalex.org/W2123838014","https://openalex.org/W2126258474","https://openalex.org/W2140380970","https://openalex.org/W2323607629","https://openalex.org/W3016005719","https://openalex.org/W3141620748"],"related_works":["https://openalex.org/W2134806353","https://openalex.org/W1972013943","https://openalex.org/W2516794663","https://openalex.org/W2809889545","https://openalex.org/W2559842030","https://openalex.org/W2891188466","https://openalex.org/W2114346412","https://openalex.org/W2142914495","https://openalex.org/W4381801338","https://openalex.org/W2308335786"],"abstract_inverted_index":{"The":[0],"performance":[1],"of":[2,16,53,92,135,152],"logic":[3,28,72],"function":[4],"could":[5,167],"be":[6,168],"affected":[7],"significantly":[8],"by":[9,156],"the":[10,14,35,38,51,93,110,132,140,146,149],"noise":[11],"effect":[12],"as":[13,37,145],"dimension":[15],"CMOS":[17],"devices":[18],"scales":[19],"to":[20,109],"nanometers.":[21],"Thus,":[22],"many":[23],"pertinent":[24],"researches":[25],"about":[26],"noise-tolerant":[27,71],"gate":[29],"have":[30,58],"received":[31],"growing":[32],"attention.":[33],"Considering":[34],"randomness":[36],"noise's":[39],"nature,":[40],"probabilistic-based":[41],"approach":[42],"proves":[43],"better":[44],"noise-immunity":[45,166],"and":[46,78,116],"three":[47],"design":[48,73,127,154],"schemes":[49],"with":[50,101,131],"technique":[52,84],"Markov":[54],"Random":[55],"Field":[56],"(MRF)":[57],"been":[59,86,106],"proposed":[60,126],"in":[61,95],"[1]-[3].":[62],"In":[63],"this":[64],"paper,":[65],"a":[66],"general":[67],"circuit":[68,112],"scheme":[69,113],"for":[70],"based":[74,120],"on":[75,121,158],"MRF":[76],"theory":[77],"Differential":[79],"Cascode":[80],"Voltage":[81],"Switch":[82],"(DCVS)":[83],"has":[85,105],"proposed,":[87],"which":[88,162],"is":[89],"an":[90],"extension":[91],"work":[94],"[3],":[96],"[4].":[97],"A":[98],"DCVS":[99],"block":[100],"only":[102],"four":[103],"transistors":[104],"successfully":[107],"inserted":[108],"original":[111],"from":[114],"[3]":[115,161],"extensive":[117],"simulation":[118],"results":[119],"HSPICE":[122],"show":[123],"that":[124,164],"our":[125,153,171],"can":[128],"operate":[129],"correctly":[130],"input":[133],"signal":[134],"1dB":[136],"SNR.":[137],"When":[138],"using":[139],"Kullback-Leibler":[141],"Distance":[142],"(KLD)":[143],"[5]":[144],"evaluation":[147],"parameter,":[148],"KLD":[150],"value":[151],"decreases":[155],"76.5%":[157],"average":[159],"than":[160],"means":[163],"superior":[165],"obtained":[169],"through":[170],"work.":[172]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
