{"id":"https://openalex.org/W2120662892","doi":"https://doi.org/10.1109/newcas.2013.6573564","title":"A 12-bit 200KS/s SAR ADC with a mixed switching scheme and integer-based split capacitor array","display_name":"A 12-bit 200KS/s SAR ADC with a mixed switching scheme and integer-based split capacitor array","publication_year":2013,"publication_date":"2013-06-01","ids":{"openalex":"https://openalex.org/W2120662892","doi":"https://doi.org/10.1109/newcas.2013.6573564","mag":"2120662892"},"language":"en","primary_location":{"id":"doi:10.1109/newcas.2013.6573564","is_oa":false,"landing_page_url":"https://doi.org/10.1109/newcas.2013.6573564","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5075907934","display_name":"Lin Deng","orcid":null},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]},{"id":"https://openalex.org/I4210092088","display_name":"Zhejiang Province Institute of Architectural Design and Research","ror":"https://ror.org/00f89ms08","country_code":"CN","type":"facility","lineage":["https://openalex.org/I4210092088"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Lin Deng","raw_affiliation_strings":["Institute of VLSI Design, Zhejiang University, Hangzhou, China","Institute of VLSI Design Zhejiang University Hangzhou China"],"affiliations":[{"raw_affiliation_string":"Institute of VLSI Design, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I4210092088","https://openalex.org/I76130692"]},{"raw_affiliation_string":"Institute of VLSI Design Zhejiang University Hangzhou China","institution_ids":["https://openalex.org/I4210092088","https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002812644","display_name":"Chao Yang","orcid":"https://orcid.org/0000-0003-3810-270X"},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]},{"id":"https://openalex.org/I4210092088","display_name":"Zhejiang Province Institute of Architectural Design and Research","ror":"https://ror.org/00f89ms08","country_code":"CN","type":"facility","lineage":["https://openalex.org/I4210092088"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chao Yang","raw_affiliation_strings":["Institute of VLSI Design, Zhejiang University, Hangzhou, China","Institute of VLSI Design Zhejiang University Hangzhou China"],"affiliations":[{"raw_affiliation_string":"Institute of VLSI Design, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I4210092088","https://openalex.org/I76130692"]},{"raw_affiliation_string":"Institute of VLSI Design Zhejiang University Hangzhou China","institution_ids":["https://openalex.org/I4210092088","https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066353712","display_name":"Menglian Zhao","orcid":"https://orcid.org/0000-0002-2500-2892"},"institutions":[{"id":"https://openalex.org/I4210092088","display_name":"Zhejiang Province Institute of Architectural Design and Research","ror":"https://ror.org/00f89ms08","country_code":"CN","type":"facility","lineage":["https://openalex.org/I4210092088"]},{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Menglian Zhao","raw_affiliation_strings":["Institute of VLSI Design, Zhejiang University, Hangzhou, China","Institute of VLSI Design Zhejiang University Hangzhou China"],"affiliations":[{"raw_affiliation_string":"Institute of VLSI Design, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I4210092088","https://openalex.org/I76130692"]},{"raw_affiliation_string":"Institute of VLSI Design Zhejiang University Hangzhou China","institution_ids":["https://openalex.org/I4210092088","https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100356073","display_name":"Yang Liu","orcid":"https://orcid.org/0000-0003-0615-7036"},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]},{"id":"https://openalex.org/I4210092088","display_name":"Zhejiang Province Institute of Architectural Design and Research","ror":"https://ror.org/00f89ms08","country_code":"CN","type":"facility","lineage":["https://openalex.org/I4210092088"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yang Liu","raw_affiliation_strings":["Institute of VLSI Design, Zhejiang University, Hangzhou, China","Institute of VLSI Design Zhejiang University Hangzhou China"],"affiliations":[{"raw_affiliation_string":"Institute of VLSI Design, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I4210092088","https://openalex.org/I76130692"]},{"raw_affiliation_string":"Institute of VLSI Design Zhejiang University Hangzhou China","institution_ids":["https://openalex.org/I4210092088","https://openalex.org/I76130692"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100677577","display_name":"Xiaobo Wu","orcid":"https://orcid.org/0000-0002-1068-5934"},"institutions":[{"id":"https://openalex.org/I4210092088","display_name":"Zhejiang Province Institute of Architectural Design and Research","ror":"https://ror.org/00f89ms08","country_code":"CN","type":"facility","lineage":["https://openalex.org/I4210092088"]},{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaobo Wu","raw_affiliation_strings":["Institute of VLSI Design, Zhejiang University, Hangzhou, China","Institute of VLSI Design Zhejiang University Hangzhou China"],"affiliations":[{"raw_affiliation_string":"Institute of VLSI Design, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I4210092088","https://openalex.org/I76130692"]},{"raw_affiliation_string":"Institute of VLSI Design Zhejiang University Hangzhou China","institution_ids":["https://openalex.org/I4210092088","https://openalex.org/I76130692"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5075907934"],"corresponding_institution_ids":["https://openalex.org/I4210092088","https://openalex.org/I76130692"],"apc_list":null,"apc_paid":null,"fwci":0.7994,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.73990498,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/effective-number-of-bits","display_name":"Effective number of bits","score":0.8160492181777954},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.7432020306587219},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.7054910659790039},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5722562074661255},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.5669300556182861},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.5660021305084229},{"id":"https://openalex.org/keywords/figure-of-merit","display_name":"Figure of merit","score":0.5495048761367798},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.5227063894271851},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.48720043897628784},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.4205271005630493},{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.416289746761322},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4086177945137024},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3779737651348114},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3750267028808594},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3225099444389343},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.25921517610549927},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23098313808441162},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.20751804113388062},{"id":"https://openalex.org/keywords/electrode","display_name":"Electrode","score":0.08900359272956848}],"concepts":[{"id":"https://openalex.org/C16671190","wikidata":"https://www.wikidata.org/wiki/Q505579","display_name":"Effective number of bits","level":3,"score":0.8160492181777954},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.7432020306587219},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.7054910659790039},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5722562074661255},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.5669300556182861},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.5660021305084229},{"id":"https://openalex.org/C130277099","wikidata":"https://www.wikidata.org/wiki/Q3676605","display_name":"Figure of merit","level":2,"score":0.5495048761367798},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.5227063894271851},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.48720043897628784},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.4205271005630493},{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.416289746761322},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4086177945137024},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3779737651348114},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3750267028808594},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3225099444389343},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.25921517610549927},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23098313808441162},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.20751804113388062},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.08900359272956848},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/newcas.2013.6573564","is_oa":false,"landing_page_url":"https://doi.org/10.1109/newcas.2013.6573564","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1998486907","https://openalex.org/W2052276427","https://openalex.org/W2058848286","https://openalex.org/W2082979872","https://openalex.org/W2101004723","https://openalex.org/W2110148769","https://openalex.org/W2125521827","https://openalex.org/W6671618162"],"related_works":["https://openalex.org/W2783221760","https://openalex.org/W2759515872","https://openalex.org/W4206356469","https://openalex.org/W2904640696","https://openalex.org/W2511822798","https://openalex.org/W2341231357","https://openalex.org/W4390693196","https://openalex.org/W2542593952","https://openalex.org/W2207354743","https://openalex.org/W2082979872"],"abstract_inverted_index":{"A":[0],"low":[1,55],"power":[2,58,126],"successive":[3],"approximation":[4],"register":[5],"ADC":[6,102],"(SAR":[7],"ADC)":[8],"using":[9],"a":[10,19,61,83,96,107,115,140],"high":[11,53],"performance":[12],"integer-based":[13],"split":[14,29],"capacitor":[15,30,68],"array":[16,51],"combining":[17,65],"with":[18,70],"mixed":[20,62],"switching":[21,63,69,72],"strategy":[22,64],"is":[23,31,46,73,87,103,128,135],"presented":[24],"in":[25,95],"this":[26],"work.":[27],"The":[28],"chosen":[32],"to":[33,48,76,89,105,114],"be":[34],"2":[35],"times":[36],"unit":[37],"capacitance":[38],"rather":[39],"than":[40],"the":[41,66,100],"traditional":[42],"non-integer":[43],"value":[44],"which":[45,112],"difficult":[47],"get.":[49],"This":[50],"features":[52],"linearity,":[54],"area":[56],"and":[57,130],"consumption.":[59],"Besides,":[60],"merged":[67],"monotonic":[71],"also":[74],"used":[75,88],"save":[77],"half":[78],"of":[79,119,132,143],"total":[80],"capacitance.":[81],"And":[82],"time":[84],"domain":[85],"comparator":[86],"achieve":[90],"better":[91],"offset":[92],"performance.":[93],"Implemented":[94],"0.18-\u03bcm":[97],"CMOS":[98],"technology,":[99],"proposed":[101],"measured":[104],"have":[106],"65.5":[108],"dB":[109],"signal-to-noise-and-distortion":[110],"ratios(SNDR)":[111],"leads":[113],"10.6":[116],"effective":[117],"number":[118],"bits(ENOB)":[120],"at":[121,139],"200KS/s":[122],"sampling":[123],"rate.":[124],"Its":[125],"consumption":[127],"1.49-\u03bcW":[129],"figure":[131],"merit":[133],"(FOM)":[134],"only":[136],"4.87":[137],"fJ/c-s":[138],"voltage":[141],"supply":[142],"0.9V.":[144]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}