{"id":"https://openalex.org/W2465123170","doi":"https://doi.org/10.1109/netsoft.2016.7502464","title":"Exploiting integrated GPUs for network packet processing workloads","display_name":"Exploiting integrated GPUs for network packet processing workloads","publication_year":2016,"publication_date":"2016-06-01","ids":{"openalex":"https://openalex.org/W2465123170","doi":"https://doi.org/10.1109/netsoft.2016.7502464","mag":"2465123170"},"language":"en","primary_location":{"id":"doi:10.1109/netsoft.2016.7502464","is_oa":false,"landing_page_url":"https://doi.org/10.1109/netsoft.2016.7502464","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE NetSoft Conference and Workshops (NetSoft)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045473826","display_name":"Janet Tseng","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Janet Tseng","raw_affiliation_strings":["Intel Labs & Intel Visual and Parallel Computing Group"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Labs & Intel Visual and Parallel Computing Group","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100339138","display_name":"Ren Wang","orcid":"https://orcid.org/0000-0002-6366-8898"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ren Wang","raw_affiliation_strings":["Intel Labs & Intel Visual and Parallel Computing Group"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Labs & Intel Visual and Parallel Computing Group","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083777680","display_name":"James Tsai","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"James Tsai","raw_affiliation_strings":["Intel Labs & Intel Visual and Parallel Computing Group"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Labs & Intel Visual and Parallel Computing Group","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055797170","display_name":"Saikrishna Edupuganti","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Saikrishna Edupuganti","raw_affiliation_strings":["Intel Labs & Intel Visual and Parallel Computing Group"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Labs & Intel Visual and Parallel Computing Group","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081297933","display_name":"Alexander W. Min","orcid":"https://orcid.org/0000-0002-4846-562X"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Alexander W. Min","raw_affiliation_strings":["Intel Labs & Intel Visual and Parallel Computing Group"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Labs & Intel Visual and Parallel Computing Group","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087313725","display_name":"Shinae Woo","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Shinae Woo","raw_affiliation_strings":["Intel Labs & Intel Visual and Parallel Computing Croup"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Labs & Intel Visual and Parallel Computing Croup","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034341483","display_name":"Stephen Junkins","orcid":null},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Stephen Junkins","raw_affiliation_strings":["Department of Computer Science, KAIST"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, KAIST","institution_ids":["https://openalex.org/I157485424"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053633184","display_name":"Tsung-Yuan Charlie Tai","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tsung-Yuan Charlie Tai","raw_affiliation_strings":["Intel Labs & Intel Visual and Parallel Computing Group"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Labs & Intel Visual and Parallel Computing Group","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"161","last_page":"165"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11478","display_name":"Caching and Content Delivery","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8058319091796875},{"id":"https://openalex.org/keywords/packet-processing","display_name":"Packet processing","score":0.7819688320159912},{"id":"https://openalex.org/keywords/network-packet","display_name":"Network packet","score":0.5985085964202881},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5872499942779541},{"id":"https://openalex.org/keywords/network-processor","display_name":"Network processor","score":0.5713922381401062},{"id":"https://openalex.org/keywords/packet-analyzer","display_name":"Packet analyzer","score":0.42766934633255005},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4273827075958252},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.416207492351532},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.33031612634658813},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.22230055928230286},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.20011770725250244}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8058319091796875},{"id":"https://openalex.org/C2779581428","wikidata":"https://www.wikidata.org/wiki/Q7122997","display_name":"Packet processing","level":3,"score":0.7819688320159912},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.5985085964202881},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5872499942779541},{"id":"https://openalex.org/C74366991","wikidata":"https://www.wikidata.org/wiki/Q2755335","display_name":"Network processor","level":3,"score":0.5713922381401062},{"id":"https://openalex.org/C95362637","wikidata":"https://www.wikidata.org/wiki/Q54366","display_name":"Packet analyzer","level":3,"score":0.42766934633255005},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4273827075958252},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.416207492351532},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.33031612634658813},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.22230055928230286},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.20011770725250244},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/netsoft.2016.7502464","is_oa":false,"landing_page_url":"https://doi.org/10.1109/netsoft.2016.7502464","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE NetSoft Conference and Workshops (NetSoft)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W186989516","https://openalex.org/W1950637132","https://openalex.org/W1966127114","https://openalex.org/W1981987608","https://openalex.org/W2089874955","https://openalex.org/W2111734949","https://openalex.org/W2121021091","https://openalex.org/W2134427337","https://openalex.org/W2139325411","https://openalex.org/W2159116418","https://openalex.org/W2912601938","https://openalex.org/W4248245037","https://openalex.org/W6607544651","https://openalex.org/W6640723030"],"related_works":["https://openalex.org/W2390663577","https://openalex.org/W1993620881","https://openalex.org/W2066787952","https://openalex.org/W2991062139","https://openalex.org/W2210470417","https://openalex.org/W2281138459","https://openalex.org/W2161402239","https://openalex.org/W2009829758","https://openalex.org/W4205337484","https://openalex.org/W309372482"],"abstract_inverted_index":{"Software-based":[0],"network":[1,109],"packet":[2,29,68,97,110,129,151,183,195],"processing":[3,30,69,98,111,120,136,152,184,196],"on":[4,27,44,101,154,197],"standard":[5],"high":[6],"volume":[7],"servers":[8],"promises":[9],"better":[10],"flexibility,":[11],"manageability":[12],"and":[13,61,76,85,93,143],"scalability,":[14],"thus":[15],"gaining":[16],"tremendous":[17],"momentum":[18],"in":[19],"recent":[20],"years.":[21],"Numerous":[22],"research":[23],"efforts":[24],"have":[25],"focused":[26],"boosting":[28],"performance":[31,94,146,189],"by":[32,190],"offloading":[33],"to":[34,87,193],"discrete":[35],"Graphics":[36],"Processing":[37],"Units":[38],"(GPUs).":[39],"While":[40],"integrated":[41,90,116,173],"GPUs,":[42],"residing":[43],"the":[45,49,89,123,140,145,155,187],"same":[46],"die":[47],"with":[48,147,171],"CPU,":[50],"offer":[51],"many":[52],"advanced":[53],"features":[54],"such":[55],"as":[56],"on-chip":[57],"interconnect":[58],"CPU-GPU":[59],"communication,":[60],"shared":[62],"physical/virtual":[63],"memory,":[64],"their":[65],"applicability":[66],"for":[67,96,125],"workloads":[70,153],"has":[71],"not":[72],"been":[73],"fully":[74,114],"understood":[75],"exploited.":[77],"In":[78],"this":[79],"paper,":[80],"we":[81,104],"conduct":[82],"in-depth":[83],"profiling":[84],"analysis":[86],"understand":[88],"GPU's":[91,117],"capabilities":[92],"potential":[95],"workloads.":[99],"Based":[100],"that":[102,113,179],"understanding,":[103],"introduce":[105],"a":[106,134],"GPU":[107,181],"accelerated":[108,182],"framework":[112,142,185],"utilizes":[115],"massive":[118],"parallel":[119],"capability":[121],"without":[122],"need":[124],"large":[126],"numbers":[127],"of":[128],"batching,":[130],"which":[131],"might":[132],"cause":[133],"significant":[135],"delay.":[137],"We":[138],"implemented":[139],"proposed":[141],"evaluated":[144],"several":[148],"common,":[149],"light-weight":[150],"Intel":[156],"<sup":[157,161],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[158,162],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">\u00ae</sup>":[159,163],"Xeon":[160],"Processor":[164],"E3-1200":[165],"v4":[166],"product":[167],"family":[168],"(codename":[169],"Broadwell)":[170],"an":[172],"GT3e":[174],"GPU.":[175],"The":[176],"results":[177],"show":[178],"our":[180],"improved":[186],"throughput":[188],"2-2.5x,":[191],"compared":[192],"optimized":[194],"CPU":[198],"only.":[199]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":5}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}