{"id":"https://openalex.org/W2961359794","doi":"https://doi.org/10.1109/natw.2019.8758727","title":"Improved Random Pattern Delay Fault Coverage Using Inversion Test Points","display_name":"Improved Random Pattern Delay Fault Coverage Using Inversion Test Points","publication_year":2019,"publication_date":"2019-05-01","ids":{"openalex":"https://openalex.org/W2961359794","doi":"https://doi.org/10.1109/natw.2019.8758727","mag":"2961359794"},"language":"en","primary_location":{"id":"doi:10.1109/natw.2019.8758727","is_oa":false,"landing_page_url":"https://doi.org/10.1109/natw.2019.8758727","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 28th North Atlantic Test Workshop (NATW)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101967871","display_name":"Soham Roy","orcid":"https://orcid.org/0009-0003-1602-2036"},"institutions":[{"id":"https://openalex.org/I82497590","display_name":"Auburn University","ror":"https://ror.org/02v80fc35","country_code":"US","type":"education","lineage":["https://openalex.org/I82497590"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Soham Roy","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Auburn University, Auburn, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Auburn University, Auburn, USA","institution_ids":["https://openalex.org/I82497590"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020782159","display_name":"Brandon Stiene","orcid":null},"institutions":[{"id":"https://openalex.org/I82497590","display_name":"Auburn University","ror":"https://ror.org/02v80fc35","country_code":"US","type":"education","lineage":["https://openalex.org/I82497590"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Brandon Stiene","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Auburn University, Auburn, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Auburn University, Auburn, USA","institution_ids":["https://openalex.org/I82497590"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083602913","display_name":"Spencer K. Millican","orcid":"https://orcid.org/0000-0003-3682-4610"},"institutions":[{"id":"https://openalex.org/I82497590","display_name":"Auburn University","ror":"https://ror.org/02v80fc35","country_code":"US","type":"education","lineage":["https://openalex.org/I82497590"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Spencer K. Millican","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Auburn University, Auburn, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Auburn University, Auburn, USA","institution_ids":["https://openalex.org/I82497590"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5084081268","display_name":"Vishwani D. Agrawal","orcid":"https://orcid.org/0000-0002-7121-5979"},"institutions":[{"id":"https://openalex.org/I82497590","display_name":"Auburn University","ror":"https://ror.org/02v80fc35","country_code":"US","type":"education","lineage":["https://openalex.org/I82497590"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vishwani D. Agrawal","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Auburn University, Auburn, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Auburn University, Auburn, USA","institution_ids":["https://openalex.org/I82497590"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5101967871"],"corresponding_institution_ids":["https://openalex.org/I82497590"],"apc_list":null,"apc_paid":null,"fwci":4.093,"has_fulltext":false,"cited_by_count":24,"citation_normalized_percentile":{"value":0.94534307,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"206","last_page":"211"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/inversion","display_name":"Inversion (geology)","score":0.6392741203308105},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.6328307390213013},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.5584405660629272},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.535932719707489},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.46364107728004456},{"id":"https://openalex.org/keywords/random-testing","display_name":"Random testing","score":0.4359566271305084},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4249763488769531},{"id":"https://openalex.org/keywords/scaling","display_name":"Scaling","score":0.4138167202472687},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4132877588272095},{"id":"https://openalex.org/keywords/fault-detection-and-isolation","display_name":"Fault detection and isolation","score":0.411540150642395},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.34884464740753174},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.2947269678115845},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.23334771394729614},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22091951966285706},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.15660279989242554},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.12251695990562439},{"id":"https://openalex.org/keywords/test-case","display_name":"Test case","score":0.1174921989440918}],"concepts":[{"id":"https://openalex.org/C1893757","wikidata":"https://www.wikidata.org/wiki/Q3653001","display_name":"Inversion (geology)","level":3,"score":0.6392741203308105},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.6328307390213013},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.5584405660629272},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.535932719707489},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.46364107728004456},{"id":"https://openalex.org/C106159264","wikidata":"https://www.wikidata.org/wiki/Q17146789","display_name":"Random testing","level":4,"score":0.4359566271305084},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4249763488769531},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.4138167202472687},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4132877588272095},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.411540150642395},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.34884464740753174},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.2947269678115845},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.23334771394729614},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22091951966285706},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.15660279989242554},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.12251695990562439},{"id":"https://openalex.org/C128942645","wikidata":"https://www.wikidata.org/wiki/Q1568346","display_name":"Test case","level":3,"score":0.1174921989440918},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C172707124","wikidata":"https://www.wikidata.org/wiki/Q423488","display_name":"Actuator","level":2,"score":0.0},{"id":"https://openalex.org/C152877465","wikidata":"https://www.wikidata.org/wiki/Q208042","display_name":"Regression analysis","level":2,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C109007969","wikidata":"https://www.wikidata.org/wiki/Q749565","display_name":"Structural basin","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/natw.2019.8758727","is_oa":false,"landing_page_url":"https://doi.org/10.1109/natw.2019.8758727","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 28th North Atlantic Test Workshop (NATW)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W260727648","https://openalex.org/W1512587249","https://openalex.org/W1515082873","https://openalex.org/W1524490503","https://openalex.org/W1595368737","https://openalex.org/W1827451039","https://openalex.org/W1953724919","https://openalex.org/W1975748616","https://openalex.org/W2021645550","https://openalex.org/W2054699995","https://openalex.org/W2124618076","https://openalex.org/W2126693329","https://openalex.org/W2142755478","https://openalex.org/W2146410394","https://openalex.org/W2161811418","https://openalex.org/W2162874773","https://openalex.org/W2171754559","https://openalex.org/W2181962062","https://openalex.org/W2523211787","https://openalex.org/W2726285617","https://openalex.org/W2937826712","https://openalex.org/W3099971795","https://openalex.org/W4247119135","https://openalex.org/W6631793748","https://openalex.org/W6785118881"],"related_works":["https://openalex.org/W2091833418","https://openalex.org/W2913077774","https://openalex.org/W4256030018","https://openalex.org/W2145089576","https://openalex.org/W2021253405","https://openalex.org/W1986228509","https://openalex.org/W2147400189","https://openalex.org/W1600468096","https://openalex.org/W2183567146","https://openalex.org/W2096843010"],"abstract_inverted_index":{"This":[0,39],"article":[1],"analyzes":[2],"and":[3],"rationalizes":[4],"the":[5],"capabilities":[6],"of":[7,16,22],"inversion-based":[8],"test":[9],"points":[10],"(TPs)":[11],"when":[12,30],"implemented":[13],"in":[14,51],"lieu":[15],"control-0/1":[17,35],"TPs.":[18],"With":[19],"upward":[20],"scaling":[21],"transistor":[23],"density,":[24],"delay":[25,42],"faults":[26],"can":[27,45],"be":[28,46],"masked":[29],"using":[31,48,54],"pseudo-random":[32,55],"tests":[33,56],"with":[34],"(\u201cconventional\u201d)":[36],"TP":[37],"architectures.":[38],"study":[40],"finds":[41],"fault":[43,61],"coverage":[44],"improved":[47],"inversion":[49],"TPs":[50],"logic":[52],"circuits":[53],"without":[57],"negatively":[58],"impacting":[59],"stuck-at":[60],"coverage.":[62]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":9},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}