{"id":"https://openalex.org/W1505351769","doi":"https://doi.org/10.1109/nanoarch.2015.7180607","title":"Architecting NP-Dynamic Skybridge","display_name":"Architecting NP-Dynamic Skybridge","publication_year":2015,"publication_date":"2015-07-01","ids":{"openalex":"https://openalex.org/W1505351769","doi":"https://doi.org/10.1109/nanoarch.2015.7180607","mag":"1505351769"},"language":"en","primary_location":{"id":"doi:10.1109/nanoarch.2015.7180607","is_oa":false,"landing_page_url":"https://doi.org/10.1109/nanoarch.2015.7180607","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH\u00b415)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref","datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://doi.org/10.7275/6453453","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063293427","display_name":"Jiajun Shi","orcid":null},"institutions":[{"id":"https://openalex.org/I24603500","display_name":"University of Massachusetts Amherst","ror":"https://ror.org/0072zz521","country_code":"US","type":"education","lineage":["https://openalex.org/I24603500"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jiajun Shi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA, USA","Department of Electrical and Computer Engineering; University of Massachusetts; Amherst MA USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA, USA","institution_ids":["https://openalex.org/I24603500"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering; University of Massachusetts; Amherst MA USA","institution_ids":["https://openalex.org/I24603500"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100335533","display_name":"Mingyu Li","orcid":"https://orcid.org/0000-0002-6924-6872"},"institutions":[{"id":"https://openalex.org/I24603500","display_name":"University of Massachusetts Amherst","ror":"https://ror.org/0072zz521","country_code":"US","type":"education","lineage":["https://openalex.org/I24603500"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mingyu Li","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA, USA","Department of Electrical and Computer Engineering; University of Massachusetts; Amherst MA USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA, USA","institution_ids":["https://openalex.org/I24603500"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering; University of Massachusetts; Amherst MA USA","institution_ids":["https://openalex.org/I24603500"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052808482","display_name":"Mostafizur Rahman","orcid":"https://orcid.org/0000-0002-7318-3528"},"institutions":[{"id":"https://openalex.org/I24603500","display_name":"University of Massachusetts Amherst","ror":"https://ror.org/0072zz521","country_code":"US","type":"education","lineage":["https://openalex.org/I24603500"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mostafizur Rahman","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA, USA","Department of Electrical and Computer Engineering; University of Massachusetts; Amherst MA USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA, USA","institution_ids":["https://openalex.org/I24603500"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering; University of Massachusetts; Amherst MA USA","institution_ids":["https://openalex.org/I24603500"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074461869","display_name":"Santosh Khasanvis","orcid":null},"institutions":[{"id":"https://openalex.org/I24603500","display_name":"University of Massachusetts Amherst","ror":"https://ror.org/0072zz521","country_code":"US","type":"education","lineage":["https://openalex.org/I24603500"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Santosh Khasanvis","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA, USA","Department of Electrical and Computer Engineering; University of Massachusetts; Amherst MA USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA, USA","institution_ids":["https://openalex.org/I24603500"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering; University of Massachusetts; Amherst MA USA","institution_ids":["https://openalex.org/I24603500"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5001906878","display_name":"Csaba Andras Moritz","orcid":"https://orcid.org/0009-0004-1878-1340"},"institutions":[{"id":"https://openalex.org/I24603500","display_name":"University of Massachusetts Amherst","ror":"https://ror.org/0072zz521","country_code":"US","type":"education","lineage":["https://openalex.org/I24603500"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Csaba Andras Moritz","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA, USA","Department of Electrical and Computer Engineering; University of Massachusetts; Amherst MA USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA, USA","institution_ids":["https://openalex.org/I24603500"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering; University of Massachusetts; Amherst MA USA","institution_ids":["https://openalex.org/I24603500"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5063293427"],"corresponding_institution_ids":["https://openalex.org/I24603500"],"apc_list":null,"apc_paid":null,"fwci":0.7891,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.74913749,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"86","issue":null,"first_page":"169","last_page":"174"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/design-for-manufacturability","display_name":"Design for manufacturability","score":0.7519810795783997},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6326310634613037},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.5524927973747253},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.543434739112854},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.54198157787323},{"id":"https://openalex.org/keywords/dynamic-range","display_name":"Dynamic range","score":0.5100834965705872},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.49205368757247925},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.48892226815223694},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.4867806136608124},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.4859796464443207},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3872632384300232},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3494926393032074},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3392125964164734},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.32868051528930664},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1746823489665985},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16919264197349548},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.10008504986763}],"concepts":[{"id":"https://openalex.org/C62064638","wikidata":"https://www.wikidata.org/wiki/Q553878","display_name":"Design for manufacturability","level":2,"score":0.7519810795783997},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6326310634613037},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.5524927973747253},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.543434739112854},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.54198157787323},{"id":"https://openalex.org/C87133666","wikidata":"https://www.wikidata.org/wiki/Q1161699","display_name":"Dynamic range","level":2,"score":0.5100834965705872},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.49205368757247925},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.48892226815223694},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.4867806136608124},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.4859796464443207},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3872632384300232},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3494926393032074},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3392125964164734},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32868051528930664},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1746823489665985},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16919264197349548},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.10008504986763},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/nanoarch.2015.7180607","is_oa":false,"landing_page_url":"https://doi.org/10.1109/nanoarch.2015.7180607","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH\u00b415)","raw_type":"proceedings-article"},{"id":"pmh:oai:scholarworks.umass.edu:masters_theses_2-1163","is_oa":false,"landing_page_url":"https://scholarworks.umass.edu/masters_theses_2/171","pdf_url":null,"source":{"id":"https://openalex.org/S4306402057","display_name":"Scholarworks (University of Massachusetts Amherst)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I24603500","host_organization_name":"University of Massachusetts Amherst","host_organization_lineage":["https://openalex.org/I24603500"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Masters Theses","raw_type":"text"},{"id":"doi:10.7275/6453453","is_oa":true,"landing_page_url":"https://doi.org/10.7275/6453453","pdf_url":null,"source":{"id":"https://openalex.org/S7407053130","display_name":"University of Massachusetts (UMass) Amherst","issn_l":null,"issn":[],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":null,"raw_type":"article-journal"}],"best_oa_location":{"id":"doi:10.7275/6453453","is_oa":true,"landing_page_url":"https://doi.org/10.7275/6453453","pdf_url":null,"source":{"id":"https://openalex.org/S7407053130","display_name":"University of Massachusetts (UMass) Amherst","issn_l":null,"issn":[],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"article-journal"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.44999998807907104}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W324409780","https://openalex.org/W1489111899","https://openalex.org/W1518236483","https://openalex.org/W1521130922","https://openalex.org/W1587217691","https://openalex.org/W1661368752","https://openalex.org/W1859174109","https://openalex.org/W1969132801","https://openalex.org/W1977103279","https://openalex.org/W1981823766","https://openalex.org/W1984133105","https://openalex.org/W2057902568","https://openalex.org/W2072117998","https://openalex.org/W2083301212","https://openalex.org/W2098807563","https://openalex.org/W2108971405","https://openalex.org/W2111269147","https://openalex.org/W2147549538","https://openalex.org/W2155028245","https://openalex.org/W2155184842","https://openalex.org/W3150025755","https://openalex.org/W3212618473","https://openalex.org/W4240172254","https://openalex.org/W6630933654","https://openalex.org/W6639194140","https://openalex.org/W6675222617"],"related_works":["https://openalex.org/W1979360617","https://openalex.org/W2975406511","https://openalex.org/W1988354418","https://openalex.org/W2341392992","https://openalex.org/W2143750673","https://openalex.org/W2388589331","https://openalex.org/W2520621519","https://openalex.org/W2366713167","https://openalex.org/W2023781639","https://openalex.org/W2997716136"],"abstract_inverted_index":{"This":[0],"paper":[1],"introduces":[2],"a":[3,15,37,82],"new":[4],"fine-grained":[5,23],"3D":[6,18,31,56,60,80,98,101],"IC":[7,19],"fabric":[8],"technology":[9],"called":[10],"NP-Dynamic":[11,34,59,91,128],"Skybridge.":[12],"Skybridge":[13,129],"is":[14],"family":[16],"of":[17,66,85],"technologies":[20],"that":[21],"provides":[22,81],"vertical":[24],"integration.":[25],"In":[26],"comparison":[27,118],"to":[28,107,119,132],"the":[29,33],"original":[30],"Skybridge,":[32,92],"approach":[35],"enables":[36,63],"more":[38],"comprehensive":[39],"logic":[40,67],"style":[41,62],"for":[42,89,114],"improved":[43],"efficiency.":[44],"It":[45],"addresses":[46],"device,":[47],"circuit,":[48],"connectivity":[49],"and":[50,72,103,110,136],"manufacturability":[51],"requirements":[52],"with":[53],"an":[54],"integrated":[55],"mindset.":[57],"The":[58],"circuit":[61,99],"wide":[64],"range":[65],"expressions,":[68],"simple":[69],"clocking":[70],"scheme,":[71],"reduces":[73],"buffer":[74],"requirements.":[75],"Architected":[76],"interconnect":[77],"framework":[78],"in":[79,117],"high":[83],"degree":[84],"connectivity.":[86],"Bottom-up":[87],"evaluations":[88],"16-nm":[90,120],"considering":[93],"material":[94],"properties,":[95],"nanoscale":[96],"transport,":[97],"style,":[100],"placement":[102],"layout":[104],"reveal":[105],"up":[106,131],"50x":[108],"density":[109,134],"25x":[111],"power":[112,139],"benefits":[113],"4-bit":[115,126],"CLA":[116],"CMOS":[121],"at":[122],"comparable":[123],"performance.":[124],"For":[125],"multiplier,":[127],"shows":[130],"90x":[133],"benefit":[135],"8x":[137],"lower":[138],"vs.":[140],"CMOS.":[141]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}