{"id":"https://openalex.org/W2094789258","doi":"https://doi.org/10.1109/nanoarch.2013.6623061","title":"Design of 8T-nanowire RAM array","display_name":"Design of 8T-nanowire RAM array","publication_year":2013,"publication_date":"2013-07-01","ids":{"openalex":"https://openalex.org/W2094789258","doi":"https://doi.org/10.1109/nanoarch.2013.6623061","mag":"2094789258"},"language":"en","primary_location":{"id":"doi:10.1109/nanoarch.2013.6623061","is_oa":false,"landing_page_url":"https://doi.org/10.1109/nanoarch.2013.6623061","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078003656","display_name":"Vikram Suresh","orcid":"https://orcid.org/0000-0001-8879-1967"},"institutions":[{"id":"https://openalex.org/I24603500","display_name":"University of Massachusetts Amherst","ror":"https://ror.org/0072zz521","country_code":"US","type":"education","lineage":["https://openalex.org/I24603500"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vikram Suresh","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, USA","Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, USA","institution_ids":["https://openalex.org/I24603500"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA, USA","institution_ids":["https://openalex.org/I24603500"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101757028","display_name":"A. Shanmugam","orcid":"https://orcid.org/0000-0001-6125-9735"},"institutions":[{"id":"https://openalex.org/I24603500","display_name":"University of Massachusetts Amherst","ror":"https://ror.org/0072zz521","country_code":"US","type":"education","lineage":["https://openalex.org/I24603500"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Akshaya Shanmugam","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, USA","Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, USA","institution_ids":["https://openalex.org/I24603500"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA, USA","institution_ids":["https://openalex.org/I24603500"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068517935","display_name":"Lekshmi Krishnan","orcid":null},"institutions":[{"id":"https://openalex.org/I24603500","display_name":"University of Massachusetts Amherst","ror":"https://ror.org/0072zz521","country_code":"US","type":"education","lineage":["https://openalex.org/I24603500"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Lekshmi Krishnan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, USA","Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, USA","institution_ids":["https://openalex.org/I24603500"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA, USA","institution_ids":["https://openalex.org/I24603500"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076775997","display_name":"Avinash Bijjal","orcid":null},"institutions":[{"id":"https://openalex.org/I24603500","display_name":"University of Massachusetts Amherst","ror":"https://ror.org/0072zz521","country_code":"US","type":"education","lineage":["https://openalex.org/I24603500"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Avinash Bijjal","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, USA","Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, USA","institution_ids":["https://openalex.org/I24603500"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA, USA","institution_ids":["https://openalex.org/I24603500"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052808482","display_name":"Mostafizur Rahman","orcid":"https://orcid.org/0000-0002-7318-3528"},"institutions":[{"id":"https://openalex.org/I24603500","display_name":"University of Massachusetts Amherst","ror":"https://ror.org/0072zz521","country_code":"US","type":"education","lineage":["https://openalex.org/I24603500"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mostafizur Rahman","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, USA","Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, USA","institution_ids":["https://openalex.org/I24603500"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA, USA","institution_ids":["https://openalex.org/I24603500"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5020547259","display_name":"Andras Moritz","orcid":null},"institutions":[{"id":"https://openalex.org/I24603500","display_name":"University of Massachusetts Amherst","ror":"https://ror.org/0072zz521","country_code":"US","type":"education","lineage":["https://openalex.org/I24603500"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Andras Moritz","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, USA","Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, USA","institution_ids":["https://openalex.org/I24603500"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA, USA","institution_ids":["https://openalex.org/I24603500"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.7201,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.76093442,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"152","last_page":"157"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8596441745758057},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.6961594820022583},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5770357251167297},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5660508871078491},{"id":"https://openalex.org/keywords/leakage-power","display_name":"Leakage power","score":0.5115183591842651},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.47528019547462463},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.44615015387535095},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4388875961303711},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.41454100608825684},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36321425437927246},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.33973029255867004},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.31990623474121094},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.27071478962898254},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.18829742074012756},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.1449517011642456},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1277911365032196},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08961933851242065}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8596441745758057},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.6961594820022583},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5770357251167297},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5660508871078491},{"id":"https://openalex.org/C2987719587","wikidata":"https://www.wikidata.org/wiki/Q1811428","display_name":"Leakage power","level":4,"score":0.5115183591842651},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.47528019547462463},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.44615015387535095},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4388875961303711},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.41454100608825684},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36321425437927246},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33973029255867004},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.31990623474121094},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.27071478962898254},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.18829742074012756},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.1449517011642456},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1277911365032196},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08961933851242065},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/nanoarch.2013.6623061","is_oa":false,"landing_page_url":"https://doi.org/10.1109/nanoarch.2013.6623061","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.46000000834465027,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1550639219","https://openalex.org/W1558097909","https://openalex.org/W1778573787","https://openalex.org/W1972800815","https://openalex.org/W1982757128","https://openalex.org/W2001894083","https://openalex.org/W2004387513","https://openalex.org/W2007083443","https://openalex.org/W2009150647","https://openalex.org/W2053828888","https://openalex.org/W2055673935","https://openalex.org/W2073237284","https://openalex.org/W2079163915","https://openalex.org/W2096142955","https://openalex.org/W2113115586","https://openalex.org/W2117043376","https://openalex.org/W2126967076","https://openalex.org/W2144383902","https://openalex.org/W2147004330","https://openalex.org/W2158017528","https://openalex.org/W2162983760","https://openalex.org/W2543433351","https://openalex.org/W2545316175","https://openalex.org/W6677260143","https://openalex.org/W6902621508"],"related_works":["https://openalex.org/W2297319780","https://openalex.org/W2178217057","https://openalex.org/W1972800815","https://openalex.org/W2548830639","https://openalex.org/W2159770326","https://openalex.org/W4252086734","https://openalex.org/W1505038800","https://openalex.org/W2051027227","https://openalex.org/W2183559057","https://openalex.org/W309165247"],"abstract_inverted_index":{"SRAM":[0],"based":[1,26,38,50],"memory":[2,24,45],"blocks":[3],"constitute":[4],"a":[5,35,57,161,188],"major":[6],"part":[7],"of":[8,23,61,124,176,204],"state-of-art":[9],"processor":[10],"architectures.":[11],"Increasing":[12],"complexity":[13],"and":[14,65,79,106,129,167,181,213],"variation":[15],"in":[16,126,131,164,179],"nanometer":[17],"CMOS":[18],"fabrication":[19],"has":[20],"prompted":[21],"exploration":[22],"circuits":[25,212],"on":[27,51,86,210],"emerging":[28],"nanofabrics.":[29],"In":[30,153],"this":[31],"work,":[32],"we":[33],"propose":[34,214],"new":[36],"8T-Nanowire":[37],"RAM":[39],"(8T-NWRAM)":[40],"circuit":[41],"for":[42,193],"high":[43,81,136,150],"density":[44],"arrays.":[46],"The":[47,70,83,139],"design":[48,197,216],"is":[49,73,89,96,145,187],"N":[52,114],"<sup":[53,91,115],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[54,92,116],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">3</sup>":[55,117],"ASIC,":[56],"nanofabric":[58],"using":[59,113],"combination":[60],"crosspoint":[62],"nanowire":[63],"FETs":[64],"integration":[66],"with":[67,155],"metal":[68],"interconnects.":[69],"layout":[71],"implementation":[72],"optimized":[74],"to":[75,100,135,149,191,218],"reduce":[76],"bitline":[77],"load":[78],"achieve":[80],"performance.":[82],"upper":[84],"bound":[85],"bitcell":[87,220],"area":[88,180],"0.1\u03bcm":[90],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[93],",":[94],"which":[95],"50%":[97],"more":[98],"compared":[99,134,148],"conventional":[101],"6T-SRAM.":[102],"However,":[103],"both":[104],"performance":[105,137,151,194],"leakage":[107,141,183],"are":[108],"significantly":[109],"improved.":[110],"Circuit":[111],"simulation":[112],"ASIC":[118],"2C-xnwFET":[119],"device":[120],"models":[121],"show":[122],"improvements":[123],">2X":[125],"read":[127,165],"time":[128,133,166],"~4X":[130],"write":[132,170],"SRAM.":[138,152],"average":[140,182],"power":[142],"at":[143,173],"0.2nW":[144],"~20X":[146],"smaller":[147],"comparison":[154],"existing":[156],"10T-NWRAM,":[157],"the":[158,174,202],"8T-NWRAM":[159,186],"provides":[160],"twofold":[162],"improvement":[163],"~46%":[168],"faster":[169],"time,":[171],"but":[172],"expense":[175],"~30%":[177],"increase":[178],"power.":[184],"Thus,":[185],"viable":[189],"alternative":[190],"10T-NWRAM":[192],"vs":[195],"area/leakage":[196],"requirement.":[198],"We":[199],"also":[200],"study":[201],"impact":[203],"supply":[205],"noise":[206],"induced":[207],"clock":[208],"jitter":[209],"NWRAM":[211],"adequate":[215],"margin":[217],"ensure":[219],"stability.":[221]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
