{"id":"https://openalex.org/W2171563949","doi":"https://doi.org/10.1109/nanoarch.2011.5941487","title":"Self-timed nano-PLA","display_name":"Self-timed nano-PLA","publication_year":2011,"publication_date":"2011-06-01","ids":{"openalex":"https://openalex.org/W2171563949","doi":"https://doi.org/10.1109/nanoarch.2011.5941487","mag":"2171563949"},"language":"en","primary_location":{"id":"doi:10.1109/nanoarch.2011.5941487","is_oa":false,"landing_page_url":"https://doi.org/10.1109/nanoarch.2011.5941487","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 IEEE/ACM International Symposium on Nanoscale Architectures","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101917166","display_name":"Masoud Zamani","orcid":"https://orcid.org/0000-0002-5832-736X"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Masoud Zamani","raw_affiliation_strings":["Electrical and Computer Engineering, Northeastern University, Boston, USA"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, Northeastern University, Boston, USA","institution_ids":["https://openalex.org/I12912129"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064445713","display_name":"Mehdi B. Tahoori","orcid":"https://orcid.org/0000-0002-8829-5610"},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Mehdi B. Tahoori","raw_affiliation_strings":["Faculty of Informatics, Karlsruhe Institute of Technology, Karlsruhe, Germany"],"affiliations":[{"raw_affiliation_string":"Faculty of Informatics, Karlsruhe Institute of Technology, Karlsruhe, Germany","institution_ids":["https://openalex.org/I102335020"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5101917166"],"corresponding_institution_ids":["https://openalex.org/I12912129"],"apc_list":null,"apc_paid":null,"fwci":0.5299,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.72594368,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"91","issue":null,"first_page":"78","last_page":"85"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11272","display_name":"Nanowire Synthesis and Applications","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/nondeterministic-algorithm","display_name":"Nondeterministic algorithm","score":0.7657023668289185},{"id":"https://openalex.org/keywords/nanoelectronics","display_name":"Nanoelectronics","score":0.7508283853530884},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6606302857398987},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.647808849811554},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6411112546920776},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4821324050426483},{"id":"https://openalex.org/keywords/critical-path-method","display_name":"Critical path method","score":0.4411608576774597},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.42340797185897827},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.42225661873817444},{"id":"https://openalex.org/keywords/monte-carlo-method","display_name":"Monte Carlo method","score":0.4195471704006195},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.40697476267814636},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3501151502132416},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.34838464856147766},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.18776658177375793},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17859169840812683},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.16367754340171814},{"id":"https://openalex.org/keywords/nanotechnology","display_name":"Nanotechnology","score":0.14656496047973633},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.09192958474159241},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.0912783145904541},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.08003729581832886}],"concepts":[{"id":"https://openalex.org/C176181172","wikidata":"https://www.wikidata.org/wiki/Q3490301","display_name":"Nondeterministic algorithm","level":2,"score":0.7657023668289185},{"id":"https://openalex.org/C141400236","wikidata":"https://www.wikidata.org/wiki/Q1479544","display_name":"Nanoelectronics","level":2,"score":0.7508283853530884},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6606302857398987},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.647808849811554},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6411112546920776},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4821324050426483},{"id":"https://openalex.org/C115874739","wikidata":"https://www.wikidata.org/wiki/Q825377","display_name":"Critical path method","level":2,"score":0.4411608576774597},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.42340797185897827},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.42225661873817444},{"id":"https://openalex.org/C19499675","wikidata":"https://www.wikidata.org/wiki/Q232207","display_name":"Monte Carlo method","level":2,"score":0.4195471704006195},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.40697476267814636},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3501151502132416},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.34838464856147766},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.18776658177375793},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17859169840812683},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.16367754340171814},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.14656496047973633},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.09192958474159241},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0912783145904541},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.08003729581832886},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/nanoarch.2011.5941487","is_oa":false,"landing_page_url":"https://doi.org/10.1109/nanoarch.2011.5941487","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 IEEE/ACM International Symposium on Nanoscale Architectures","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.4300000071525574}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W1990161726","https://openalex.org/W2001992992","https://openalex.org/W2030636464","https://openalex.org/W2050111978","https://openalex.org/W2058593410","https://openalex.org/W2062051106","https://openalex.org/W2072104361","https://openalex.org/W2072824436","https://openalex.org/W2091166549","https://openalex.org/W2104445191","https://openalex.org/W2105761964","https://openalex.org/W2111173832","https://openalex.org/W2120623380","https://openalex.org/W2128181612","https://openalex.org/W2135459326","https://openalex.org/W2137249916","https://openalex.org/W2139399616","https://openalex.org/W2141332278","https://openalex.org/W2147004330","https://openalex.org/W2153530021","https://openalex.org/W2170247187","https://openalex.org/W3145243790","https://openalex.org/W4231539433","https://openalex.org/W4233477625","https://openalex.org/W4251134124","https://openalex.org/W6669043385"],"related_works":["https://openalex.org/W2385877031","https://openalex.org/W2381853949","https://openalex.org/W2375445966","https://openalex.org/W4240755120","https://openalex.org/W1530968337","https://openalex.org/W2010017773","https://openalex.org/W2910085732","https://openalex.org/W2010155603","https://openalex.org/W2322326361","https://openalex.org/W2793417036"],"abstract_inverted_index":{"Emerging":[0],"molecular":[1],"based":[2],"nanoelectronics":[3],"is":[4],"a":[5,51,82],"promising":[6],"alternatives":[7],"for":[8,78,105],"current":[9],"CMOS":[10],"technology":[11],"to":[12,49,54,102],"reduce":[13],"manufacturing":[14],"costs":[15],"and":[16,35],"achieve":[17],"higher":[18],"levels":[19],"of":[20,37,70,84,128],"integration.":[21],"Extreme":[22],"parameter":[23],"variations":[24,59,80],"resulted":[25],"from":[26],"nondeterministic":[27],"nanofabrication":[28],"can":[29],"seriously":[30],"affect":[31],"the":[32,67,88,92,110,115],"correct":[33],"functionality":[34],"performance":[36],"circuits":[38,89,107],"implemented":[39,90,108],"in":[40,119,122,124],"this":[41,44],"technology.":[42],"In":[43],"paper,":[45],"we":[46],"introduce":[47],"modifications":[48],"nano-PLA,":[50],"major":[52],"nano-architecture,":[53],"immune":[55,97],"it":[56],"against":[57,98],"extreme":[58],"by":[60],"using":[61],"self-timed":[62],"local":[63],"control":[64],"signaling":[65],"within":[66],"blocks":[68],"instead":[69],"external":[71],"global":[72],"signals.":[73],"Extensive":[74],"Monte":[75],"Carlo":[76],"simulations":[77],"delay":[79,99,127],"on":[81,91,109],"set":[83],"benchmarks":[85],"confirms":[86],"that":[87],"proposed":[93,116],"architecture":[94,117],"are":[95],"100%":[96],"variation,":[100],"compared":[101],"only":[103],"37%":[104],"those":[106],"original":[111],"nano-PLA":[112],"architecture.":[113],"Moreover,":[114],"results":[118],"47%":[120],"reduction,":[121],"average,":[123],"critical":[125],"path":[126],"mapped":[129],"circuits.":[130]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2013,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
