{"id":"https://openalex.org/W4391382393","doi":"https://doi.org/10.1109/mwscas57524.2023.10406087","title":"A 1-1.7 GHz Cryogenic Fractional-N CP-PLL for Quantum Computing Applications","display_name":"A 1-1.7 GHz Cryogenic Fractional-N CP-PLL for Quantum Computing Applications","publication_year":2023,"publication_date":"2023-08-06","ids":{"openalex":"https://openalex.org/W4391382393","doi":"https://doi.org/10.1109/mwscas57524.2023.10406087"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas57524.2023.10406087","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas57524.2023.10406087","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023652141","display_name":"Wenqiang Huang","orcid":"https://orcid.org/0000-0002-3633-2862"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Wenqiang Huang","raw_affiliation_strings":["School of Integrated Circuits, Tsinghua University,Beijing,China,100084"],"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Tsinghua University,Beijing,China,100084","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091186752","display_name":"Yanshu Guo","orcid":"https://orcid.org/0000-0002-5800-8799"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yanshu Guo","raw_affiliation_strings":["School of Integrated Circuits, Tsinghua University,Beijing,China,100084","Research Institute of Tsinghua University in Shenzhen, Guangdong, China"],"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Tsinghua University,Beijing,China,100084","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"Research Institute of Tsinghua University in Shenzhen, Guangdong, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012846930","display_name":"Yaoyu Li","orcid":"https://orcid.org/0000-0002-6621-1308"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yaoyu Li","raw_affiliation_strings":["School of Integrated Circuits, Tsinghua University,Beijing,China,100084"],"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Tsinghua University,Beijing,China,100084","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100356864","display_name":"Zhihua Wang","orcid":"https://orcid.org/0000-0001-6567-0759"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhihua Wang","raw_affiliation_strings":["School of Integrated Circuits, Tsinghua University,Beijing,China,100084","Research Institute of Tsinghua University in Shenzhen, Guangdong, China"],"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Tsinghua University,Beijing,China,100084","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"Research Institute of Tsinghua University in Shenzhen, Guangdong, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016044907","display_name":"Yuanjin Zheng","orcid":"https://orcid.org/0000-0002-5768-367X"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Yuanjin Zheng","raw_affiliation_strings":["Nanyang Technological University,Singapore,Singapore","Nanyang Technological University, Singapore, Singapore"],"affiliations":[{"raw_affiliation_string":"Nanyang Technological University,Singapore,Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Nanyang Technological University, Singapore, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103068040","display_name":"Tiefu Li","orcid":"https://orcid.org/0009-0007-5851-6519"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tiefu Li","raw_affiliation_strings":["School of Integrated Circuits, Tsinghua University,Beijing,China,100084"],"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Tsinghua University,Beijing,China,100084","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063888012","display_name":"Hanjun Jiang","orcid":"https://orcid.org/0000-0003-4911-0748"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hanjun Jiang","raw_affiliation_strings":["School of Integrated Circuits, Tsinghua University,Beijing,China,100084","Research Institute of Tsinghua University in Shenzhen, Guangdong, China"],"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Tsinghua University,Beijing,China,100084","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"Research Institute of Tsinghua University in Shenzhen, Guangdong, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100715034","display_name":"Jia Wen","orcid":"https://orcid.org/0000-0003-1970-5329"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wen Jia","raw_affiliation_strings":["Research Institute of Tsinghua University in Shenzhen,Guangdong,China,518057"],"affiliations":[{"raw_affiliation_string":"Research Institute of Tsinghua University in Shenzhen,Guangdong,China,518057","institution_ids":["https://openalex.org/I99065089"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5023652141"],"corresponding_institution_ids":["https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":0.2678,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.56708545,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"172","last_page":"176"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.9250847101211548},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.7866159677505493},{"id":"https://openalex.org/keywords/cryogenic-temperature","display_name":"Cryogenic temperature","score":0.6549940705299377},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.6368177533149719},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.5616466403007507},{"id":"https://openalex.org/keywords/pll-multibit","display_name":"PLL multibit","score":0.5409032702445984},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5360717177391052},{"id":"https://openalex.org/keywords/cryogenics","display_name":"Cryogenics","score":0.5047694444656372},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.47598591446876526},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44959911704063416},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.44287461042404175},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4374414086341858},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.4182782471179962},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.3451162576675415},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2971009612083435},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.25591638684272766},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2007768452167511},{"id":"https://openalex.org/keywords/thermodynamics","display_name":"Thermodynamics","score":0.07956451177597046}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.9250847101211548},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.7866159677505493},{"id":"https://openalex.org/C2985130431","wikidata":"https://www.wikidata.org/wiki/Q192116","display_name":"Cryogenic temperature","level":2,"score":0.6549940705299377},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.6368177533149719},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.5616466403007507},{"id":"https://openalex.org/C77881186","wikidata":"https://www.wikidata.org/wiki/Q7119642","display_name":"PLL multibit","level":4,"score":0.5409032702445984},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5360717177391052},{"id":"https://openalex.org/C179725390","wikidata":"https://www.wikidata.org/wiki/Q192116","display_name":"Cryogenics","level":2,"score":0.5047694444656372},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.47598591446876526},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44959911704063416},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.44287461042404175},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4374414086341858},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.4182782471179962},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.3451162576675415},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2971009612083435},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.25591638684272766},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2007768452167511},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.07956451177597046},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas57524.2023.10406087","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas57524.2023.10406087","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7099999785423279,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W2007642404","https://openalex.org/W2048610886","https://openalex.org/W2174510006","https://openalex.org/W2591606412","https://openalex.org/W2620486237","https://openalex.org/W2782187376","https://openalex.org/W2795812195","https://openalex.org/W2943308931","https://openalex.org/W2964217194","https://openalex.org/W2971768824","https://openalex.org/W3008170113","https://openalex.org/W3015289174","https://openalex.org/W3015539898","https://openalex.org/W3103438630","https://openalex.org/W3203060215","https://openalex.org/W4312420757"],"related_works":["https://openalex.org/W1576949837","https://openalex.org/W984417604","https://openalex.org/W2498262093","https://openalex.org/W2139484866","https://openalex.org/W2188779191","https://openalex.org/W3134930219","https://openalex.org/W2967785526","https://openalex.org/W188830667","https://openalex.org/W1605914315","https://openalex.org/W1994021281"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"we":[3,25],"derive":[4],"the":[5,18,27,39,74,106],"difference":[6],"of":[7,20,79,104],"phase-lock-loop(PLL)":[8],"parameters":[9],"under":[10,22,30,51,97,111,120],"cryogenic":[11,31,112],"temperature":[12,15,32],"and":[13,33,84,92],"room":[14,98,121],"according":[16],"to":[17,45,55],"characterization":[19],"MOSFET":[21],"3.5K.":[23],"Then,":[24],"discuss":[26],"noise":[28,78],"source":[29],"optimize":[34],"PLL":[35,62,75],"design":[36,58],"based":[37],"on":[38],"discussion":[40],"above.":[41],"Finally,":[42],"a":[43,101],"1":[44],"1.7":[46],"GHz":[47],"fractional-N":[48,86],"CP-PLL":[49],"working":[50],"3.5K":[52,72],"is":[53,109,115],"proposed":[54,61],"validate":[56],"our":[57],"methodology.":[59],"The":[60],"has":[63],"been":[64],"fabricated":[65],"in":[66],"28-nm":[67],"bulk":[68],"CMOS":[69],"process.":[70],"At":[71],"temperature,":[73,113],"achieves":[76],"phase":[77],"-":[80],"122.7dBc/Hz":[81],"@":[82],"1MHz":[83],"2.2ps":[85],"RMS":[87],"jitter,":[88],"which":[89,114],"are":[90],"~10dB":[91],"3.4ps":[93],"lower":[94,117],"than":[95,118],"that":[96,119],"temperature.":[99,122],"With":[100],"supply":[102],"voltage":[103],"0.9V,":[105],"power":[107],"consumption":[108],"1.52mW":[110],"0.5mW":[116]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}