{"id":"https://openalex.org/W4391410249","doi":"https://doi.org/10.1109/mwscas57524.2023.10405868","title":"Challenges on Design and Technology Co-Optimization: Design Automation Perspective","display_name":"Challenges on Design and Technology Co-Optimization: Design Automation Perspective","publication_year":2023,"publication_date":"2023-08-06","ids":{"openalex":"https://openalex.org/W4391410249","doi":"https://doi.org/10.1109/mwscas57524.2023.10405868"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas57524.2023.10405868","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas57524.2023.10405868","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049474875","display_name":"Taewhan Kim","orcid":"https://orcid.org/0000-0002-6114-3772"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Taewhan Kim","raw_affiliation_strings":["School of Electrical and Computer Engineering, Seoul National University,South Korea","School of Electrical and Computer Engineering, Seoul National University, South Korea"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Seoul National University,South Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"School of Electrical and Computer Engineering, Seoul National University, South Korea","institution_ids":["https://openalex.org/I139264467"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5049474875"],"corresponding_institution_ids":["https://openalex.org/I139264467"],"apc_list":null,"apc_paid":null,"fwci":0.7971,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.72964386,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"212","last_page":"216"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.716888427734375},{"id":"https://openalex.org/keywords/die","display_name":"Die (integrated circuit)","score":0.6472394466400146},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.6247843503952026},{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.6060315370559692},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.5878391265869141},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5162351131439209},{"id":"https://openalex.org/keywords/perspective","display_name":"Perspective (graphical)","score":0.4566229581832886},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3810339868068695},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3520747423171997},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2860751748085022},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.1428597867488861},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.13265857100486755},{"id":"https://openalex.org/keywords/mechanical-engineering","display_name":"Mechanical engineering","score":0.10927113890647888}],"concepts":[{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.716888427734375},{"id":"https://openalex.org/C111106434","wikidata":"https://www.wikidata.org/wiki/Q1072430","display_name":"Die (integrated circuit)","level":2,"score":0.6472394466400146},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.6247843503952026},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.6060315370559692},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.5878391265869141},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5162351131439209},{"id":"https://openalex.org/C12713177","wikidata":"https://www.wikidata.org/wiki/Q1900281","display_name":"Perspective (graphical)","level":2,"score":0.4566229581832886},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3810339868068695},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3520747423171997},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2860751748085022},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.1428597867488861},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.13265857100486755},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.10927113890647888},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas57524.2023.10405868","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas57524.2023.10405868","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5600000023841858,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[{"id":"https://openalex.org/G344988771","display_name":null,"funder_award_id":"2021-R1A2C2008864","funder_id":"https://openalex.org/F4320322120","funder_display_name":"National Research Foundation of Korea"},{"id":"https://openalex.org/G3798340608","display_name":null,"funder_award_id":"10230223-05124-01","funder_id":"https://openalex.org/F4320315121","funder_display_name":"Samsung Advanced Institute of Technology"},{"id":"https://openalex.org/G5099282605","display_name":null,"funder_award_id":"2021-0-00754","funder_id":"https://openalex.org/F4320324891","funder_display_name":"Iran Telecommunication Research Center"}],"funders":[{"id":"https://openalex.org/F4320315121","display_name":"Samsung Advanced Institute of Technology","ror":null},{"id":"https://openalex.org/F4320322120","display_name":"National Research Foundation of Korea","ror":"https://ror.org/013aysd81"},{"id":"https://openalex.org/F4320324891","display_name":"Iran Telecommunication Research Center","ror":"https://ror.org/01a3g2z22"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W1967661769","https://openalex.org/W2011778848","https://openalex.org/W2051145782","https://openalex.org/W2095166045","https://openalex.org/W2346205343","https://openalex.org/W2407716185","https://openalex.org/W2483622942","https://openalex.org/W2604156411","https://openalex.org/W2738393560","https://openalex.org/W2840197104","https://openalex.org/W2898992009","https://openalex.org/W2944442872","https://openalex.org/W2946290290","https://openalex.org/W2997716136","https://openalex.org/W3122795190","https://openalex.org/W3163595402","https://openalex.org/W4200437295","https://openalex.org/W4200557846","https://openalex.org/W4200577934","https://openalex.org/W4285676429","https://openalex.org/W4312121166","https://openalex.org/W4378800776","https://openalex.org/W4379116107"],"related_works":["https://openalex.org/W2171793444","https://openalex.org/W3211857759","https://openalex.org/W2066616140","https://openalex.org/W3214257365","https://openalex.org/W2135308224","https://openalex.org/W2060392256","https://openalex.org/W4312076519","https://openalex.org/W3105668393","https://openalex.org/W1986774039","https://openalex.org/W4213207057"],"abstract_inverted_index":{"This":[0],"paper":[1,81],"surveys":[2],"a":[3,49],"number":[4],"of":[5,26,63,70,120],"noticeable":[6],"recent":[7],"research":[8],"activities":[9,77],"on":[10],"the":[11,24,30,58,71,75,84,116,127],"design":[12,18],"and":[13,47,66,123,135],"technology":[14,31],"co-optimization":[15],"(DTCO)":[16],"in":[17,21,61,79,138],"automation":[19],"perspective":[20],"conjunction":[22],"with":[23,118],"exploration":[25],"standard":[27,50],"cells.":[28],"As":[29],"node":[32],"advances,":[33],"it":[34],"is":[35,54],"utmost":[36],"important":[37],"to":[38,45,57,108],"enhance":[39],"EDA":[40],"tools":[41],"as":[42,44],"well":[43],"explore":[46],"find":[48],"cell":[51,87,132],"architecture":[52],"that":[53],"best":[55],"suited":[56],"target":[59],"design,":[60],"terms":[62],"performance,":[64],"power,":[65],"area":[67],"(PPA)":[68],"metrics":[69],"resulting":[72],"chip.":[73],"Specifically,":[74],"DTCO":[76,97,114,125],"surveyed":[78],"this":[80],"are":[82,91],"(1)":[83],"state-of-the-art":[85],"automatic":[86],"layout":[88],"generators,":[89],"which":[90],"essential":[92],"vehicle":[93],"for":[94],"DTCO,":[95],"(2)":[96],"utilizing":[98],"multi-bit":[99],"flip-flop":[100],"cells":[101,107,119],"by":[102],"selectively":[103],"debanking":[104],"or":[105],"resizing":[106],"resolve":[109],"timing":[110],"closure":[111],"problem,":[112],"(3)":[113],"supporting":[115],"designs":[117],"heterogeneous":[121],"heights,":[122],"(4)":[124],"considering":[126],"vertical":[128],"alignment":[129],"mismatch":[130],"between":[131],"gate":[133],"poly":[134],"metal":[136],"pitches":[137],"advanced":[139],"nodes.":[140]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":1}],"updated_date":"2026-03-12T08:34:05.389933","created_date":"2025-10-10T00:00:00"}
