{"id":"https://openalex.org/W4416727940","doi":"https://doi.org/10.1109/mwscas53549.2025.11244471","title":"140dB CMRR Rail-to-Rail Input/Output Low-Voltage Precision Differential Amplifier","display_name":"140dB CMRR Rail-to-Rail Input/Output Low-Voltage Precision Differential Amplifier","publication_year":2025,"publication_date":"2025-08-10","ids":{"openalex":"https://openalex.org/W4416727940","doi":"https://doi.org/10.1109/mwscas53549.2025.11244471"},"language":null,"primary_location":{"id":"doi:10.1109/mwscas53549.2025.11244471","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas53549.2025.11244471","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE 68th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Baochun Ding","orcid":null},"institutions":[{"id":"https://openalex.org/I4210128628","display_name":"Peking University Shenzhen Hospital","ror":"https://ror.org/03kkjyb15","country_code":"CN","type":"healthcare","lineage":["https://openalex.org/I4210128628"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Baochun Ding","raw_affiliation_strings":["Shenzhen Graduate School, Peking University,Shenzhen,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shenzhen Graduate School, Peking University,Shenzhen,China","institution_ids":["https://openalex.org/I4210128628"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100358292","display_name":"Xiaofei Li","orcid":"https://orcid.org/0000-0002-0851-3885"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaofei Li","raw_affiliation_strings":["School of Software &#x0026; Microelectronics, Peking University,Beijing,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Software &#x0026; Microelectronics, Peking University,Beijing,China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027757072","display_name":"Xingyu Qi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210128628","display_name":"Peking University Shenzhen Hospital","ror":"https://ror.org/03kkjyb15","country_code":"CN","type":"healthcare","lineage":["https://openalex.org/I4210128628"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xingyu Qi","raw_affiliation_strings":["Shenzhen Graduate School, Peking University,Shenzhen,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shenzhen Graduate School, Peking University,Shenzhen,China","institution_ids":["https://openalex.org/I4210128628"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5102009434","display_name":"Xin\u2019an Wang","orcid":"https://orcid.org/0000-0003-2028-7785"},"institutions":[{"id":"https://openalex.org/I4210128628","display_name":"Peking University Shenzhen Hospital","ror":"https://ror.org/03kkjyb15","country_code":"CN","type":"healthcare","lineage":["https://openalex.org/I4210128628"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xin'an Wang","raw_affiliation_strings":["Shenzhen Graduate School, Peking University,Shenzhen,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shenzhen Graduate School, Peking University,Shenzhen,China","institution_ids":["https://openalex.org/I4210128628"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.47622867,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"803","last_page":"807"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.866100013256073,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.866100013256073,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.019600000232458115,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.013700000010430813,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/resistor","display_name":"Resistor","score":0.713699996471405},{"id":"https://openalex.org/keywords/trimming","display_name":"Trimming","score":0.6712999939918518},{"id":"https://openalex.org/keywords/input-offset-voltage","display_name":"Input offset voltage","score":0.6205000281333923},{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.5371000170707703},{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.46389999985694885},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.42809998989105225},{"id":"https://openalex.org/keywords/differential-amplifier","display_name":"Differential amplifier","score":0.42289999127388},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4162999987602234}],"concepts":[{"id":"https://openalex.org/C137488568","wikidata":"https://www.wikidata.org/wiki/Q5321","display_name":"Resistor","level":3,"score":0.713699996471405},{"id":"https://openalex.org/C56951928","wikidata":"https://www.wikidata.org/wiki/Q3539213","display_name":"Trimming","level":2,"score":0.6712999939918518},{"id":"https://openalex.org/C63651839","wikidata":"https://www.wikidata.org/wiki/Q478566","display_name":"Input offset voltage","level":5,"score":0.6205000281333923},{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.5371000170707703},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5127000212669373},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4893999993801117},{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.46389999985694885},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.43149998784065247},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.42809998989105225},{"id":"https://openalex.org/C11722477","wikidata":"https://www.wikidata.org/wiki/Q1056298","display_name":"Differential amplifier","level":4,"score":0.42289999127388},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4162999987602234},{"id":"https://openalex.org/C89123640","wikidata":"https://www.wikidata.org/wiki/Q1523756","display_name":"Instrumentation amplifier","level":5,"score":0.39590001106262207},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.39480000734329224},{"id":"https://openalex.org/C2780191706","wikidata":"https://www.wikidata.org/wiki/Q191658","display_name":"Chopper","level":3,"score":0.37880000472068787},{"id":"https://openalex.org/C172218469","wikidata":"https://www.wikidata.org/wiki/Q4477697","display_name":"Direct-coupled amplifier","level":5,"score":0.3353999853134155},{"id":"https://openalex.org/C104419016","wikidata":"https://www.wikidata.org/wiki/Q1337490","display_name":"Johnson\u2013Nyquist noise","level":3,"score":0.30399999022483826},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.2939000129699707},{"id":"https://openalex.org/C44351266","wikidata":"https://www.wikidata.org/wiki/Q1465532","display_name":"Voltage reference","level":3,"score":0.29109999537467957},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.28189998865127563},{"id":"https://openalex.org/C68742264","wikidata":"https://www.wikidata.org/wiki/Q1736442","display_name":"Current-feedback operational amplifier","level":5,"score":0.2639999985694885},{"id":"https://openalex.org/C2779888857","wikidata":"https://www.wikidata.org/wiki/Q18378810","display_name":"Snapback","level":4,"score":0.2630999982357025},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.25040000677108765},{"id":"https://openalex.org/C189184530","wikidata":"https://www.wikidata.org/wiki/Q5508342","display_name":"Fully differential amplifier","level":5,"score":0.2500999867916107}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas53549.2025.11244471","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas53549.2025.11244471","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE 68th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2159371590","https://openalex.org/W2472405499","https://openalex.org/W2565951988","https://openalex.org/W4289713933","https://openalex.org/W4313127323"],"related_works":[],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,14,21,30,38,101,142,168,176,190],"140dB":[4],"CMRR":[5,31,145,192],"rail-to-rail":[6,146],"input/output":[7,147],"low-voltage":[8],"precision":[9,17,22,87,131,148],"differential":[10,149],"amplifier,":[11],"composed":[12],"of":[13,118,132],"high-CMRR":[15],"chopper-stabilized":[16,28],"operational":[18],"amplifier":[19,150,156],"and":[20,53,78,100,126,153,175,186],"resistor":[23,88,98,134],"trimming":[24,89,108,120],"network.":[25,136],"For":[26,85],"the":[27,58,86,91,107,116,119,130,133],"op-amp,":[29],"enhanced":[32],"input":[33,49,54,65],"stage":[34],"is":[35,66,94,151],"proposed,":[36],"utilizing":[37],"common-mode":[39],"voltage":[40,61,73,105,171],"sampling":[41],"charge":[42],"pump":[43],"(VCMCP)":[44],"circuit":[45],"to":[46,96,111,161],"ensure":[47],"constant":[48],"chopper":[50],"switch":[51],"on-resistance":[52,117],"pair":[55,80],"operation":[56],"across":[57],"entire":[59],"commonmode":[60],"(VCM)":[62],"range.":[63],"Rail-to-rail":[64],"achieved":[67],"using":[68,138],"PMOS":[69,79],"pairs,":[70],"avoiding":[71],"offset":[72,170],"shifts":[74],"caused":[75],"by":[76],"NMOS":[77],"switching,":[81],"thereby":[82],"enhancing":[83],"CMRR.":[84],"network,":[90],"E-TRIM":[92],"technique":[93],"employed":[95],"trim":[97],"mismatches,":[99],"VCMCP":[102],"provides":[103],"control":[104],"for":[106],"logic.":[109],"Compared":[110],"traditional":[112],"transmission":[113],"gate":[114],"structures,":[115],"switches":[121],"remains":[122],"stable":[123],"with":[124],"supply":[125],"reference":[127],"voltages,":[128],"ensuring":[129],"matching":[135],"Finally,":[137],"a$0.18":[139],"\\mu":[140,165,173],"~\\mathrm{m}$process,":[141],"140":[143],"dB":[144],"designed":[152],"fabricated.":[154],"The":[155],"operates":[157],"from":[158],"1.8":[159],"V":[160],"5.5":[162],"V,":[163],"consumes$450":[164],"~\\mathrm{A}$,":[166],"has":[167],"maximum":[169],"of$2.5":[172],"~\\mathrm{V}$,":[174],"noise":[177],"power":[178],"spectral":[179],"density":[180],"of$10":[181],"\\text{nV}":[182],"/":[183],"\\sqrt{\\text{Hz}}$.":[184],"Simulation":[185],"test":[187],"results":[188],"demonstrate":[189],"superior":[191],"of$\\mathbf{1":[193],"4":[194],"0":[195],"d":[196],"B}$.":[197]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-11-25T00:00:00"}
